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TPS73530QDRBRQ1 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS73530QDRBRQ1 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 26 page 8 7 6 5 OUT NC NR/FB GND IN NC NC EN 1 2 3 4 TPS735-Q1 www.ti.com SBVS252A – OCTOBER 2014 – REVISED JANUARY 2015 5 Pin Configuration and Functions DRB Package 8-Pin SON With Exposed Thermal Pad Top View NC = No internal connection. Pin Functions PIN I/O DESCRIPTION NAME NO. Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown EN 5 I mode. The EN pin can be connected to the IN pin if not used. This pin is only available for the adjustable version. The FB pin is the input to the control-loop error amplifier, FB 3 I and is used to set the output voltage of the device. GND 4 — Ground IN 8 I Input supply NC 2, 6, 7 — Not internally connected This pin is only available for the fixed voltage versions. Connecting an external capacitor to this pin NR 3 — bypasses noise generated by the internal band gap and allows the output noise to be reduced to very low levels. The maximum recommended capacitor is 0.01 µF. This pin is the output of the regulator. A small 2-µF ceramic capacitor is required from this pin to ground to OUT 1 O assure stability. Exposed thermal — The pad must be tied to the GND pin. pad Copyright © 2014–2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: TPS735-Q1 |
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