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LM2650 Datasheet(PDF) 4 Page - Texas Instruments

No. de pieza LM2650
Descripción Electrónicos  Synchronous Step-Down DC/DC Converter
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Página de inicio  http://www.ti.com
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LM2650 Datasheet(HTML) 4 Page - Texas Instruments

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LM2650
SNVS133C – JUNE 1999 – REVISED APRIL 2013
www.ti.com
Absolute Maximum Ratings
(1) (2)
(All voltages are referenced to the PGND and GND pins.)
DC Voltage at PVIN and VIN
20V
DC Voltage at SD, SLEEP LOGIC and SYNC
15V
DC current into SW
±7.5A
Junction Temperature
Limited by the IC
DC Power Dissipation(3)
1.28W
Storage Temperature
−65°C to +150°C
Soldering Time, Temperature(4)
Wave (4 seconds)
260°C
Infrared (10 seconds)
240°C
Vapor Phase (75 seconds)
219°C
ESD Susceptibility(5)
1.3 kV
(1)
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which the
device operates correctly. Operating ratings do not imply performance limits. For performance limits and associated test conditions, see
the Electrical Characteristics.
(2)
If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and
specifications.
(3)
This rating is calculated using the formula PDCmax = (TJmax − TA) / θJA, where PDCmax is the absolute maximum power dissipation, TJmax
is the maximum junction temperature, and
θJA is the junction ot ambient thermal resistance of the package. The PDCmax rating of 1.28W
results from substituting 170°C, 70°C and 78°C/W for TJmax, TA and θJA respectively. A θJAof 78°C represents the worst condition of no
heat sinking of the DW0024B small-outline package. Heat sinking allows the safe dissipation of more power. See Application Notes on
thermal management. The LM2650 actively limits its junction temperature to about 170°C.
(4)
For detailed information on soldering plastic small-outline packages, refer to the Packaging Databook published by Texas Instruments.
(5)
ESD is applied using the human-body model, a 100pF capacitor discharged through a 1.5k
Ω resistor.
Operating Ratings
(1)
Supply Voltage Range (PVIN and VIN)
4.5V to 18V
Junction Temperature Range
−40°C to +125°C
(1)
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which the
device operates correctly. Operating ratings do not imply performance limits. For performance limits and associated test conditions, see
the Electrical Characteristics.
Electrical Characteristics
VPVIN = 15V, VSLEEP LOGIC = 0V and VSD = 0V unless superseded under Conditions. Typicals and limits appearing in plain type
apply for TA = TJ = +25°C. Limits appearing in boldface type apply over the full junction temperature range shown under
Operating Ratings.
Symbol
Parameter
Conditions
Typ(1)
Limit(2)
Units
VOUT
Output Voltage
R1 = 75 k
Ω, 1%,
5.00
V
R2 = 25 k
Ω, 1%,
4.80/4.75
V(min)
7.5V
≤ VPVIN ≤ 18V
5.20/5.25
V(max)
0.12A
≤ ILOAD ≤ 3A
η1
System Efficiency
ILOAD = 1A, TA = 25°C,
94
%
FOSC Not Adjusted
η2
System Efficiency
ILOAD = 3A, TA = 25°C,
89
%
FOSC Not Adjusted
VREF
Reference Voltage
VSLEEPLOGIC = 3V
(3)
1.281/1.294
V(min)
1.25
1.219/1.206
V(max)
IQ
Quiescent Current in PWM mode
VFB = VREF
4.0
mA
−20mV(4)
6.50/7.0
mA(max)
IQS
Quiescent Current in Sleep mode
IVFB = VREF −20mV,
850
μA
VSLEEPLOGIC = 3V
(4)
1.35/1.60
mA(max)
(1)
A typical is the center of characterization data taken at TA = TJ = 25°C.
(2)
Tested at TA = TJ = 125°C and statistical correlation for room temperature and cold limits.
(3)
VREF is measured at SLEEP OUT ADJ.
(4)
Quiescent current is the total current flowing into the PVIN and VIN pins. IQ includes the current used to drive the gates of the two NMOS
power FETs at the nominal switching frequency. IQS includes no such current.
4
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