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TPS54425 Datasheet(PDF) 2 Page - Texas Instruments

No. de pieza TPS54425
Descripción Electrónicos  4-A OUTPUT SINGLE SYNCHRONOUS STEP DOWN SWITCHER WITH INTEGRATED FET ( SWIFT??
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
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TPS54425 Datasheet(HTML) 2 Page - Texas Instruments

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TPS54425
SLVSA84C
– AUGUST 2010 – REVISED JULY 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
TRANSPORT
TA
PACKAGE(2) (3)
ORDERABLE PART NUMBER
PIN
MEDIA, QUANTITY
TPS54425PWP
Tube
PowerPAD
–45°C to 85°C
14
(HTSSOP)
– PWP
TPS54425PWPR
Tape and Reel
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2)
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3)
All package options have Cu NIPDAU lead/ball finish.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
VIN1, VIN2 EN
–0.3 to 20
V
VBST
–0.3 to 26
V
VBST (10 ns transient)
–0.3 to 28
V
VI
Input voltage range
VFB VO, SS, PG
–0.3 to 6.5
V
SW1, SW2
–2 to 20
V
SW1, SW2 (10 ns transient)
–3 to 22
V
VREG5
–0.3 to 6.5
V
VO
Output voltage range
PGND1, PGND2
–0.3 to 0.3
V
Vdiff
Voltage from GND to POWERPAD
–0.2 to 0.2
V
Human Body Model (HBM)
2
kV
Electrostatic
ESD rating
discharge
Charged Device Model (CDM)
500
V
TJ
Operating junction temperature
–40 to 150
°C
Tstg
Storage temperature
–55 to 150
°C
(1)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TPS54425
THERMAL METRIC(1)
PWP
UNITS
14 PINS
θJA
Junction-to-ambient thermal resistance
55.6
θJCtop
Junction-to-case (top) thermal resistance
51.3
θJB
Junction-to-board thermal resistance
26.4
°C/W
ψJT
Junction-to-top characterization parameter
1.8
ψJB
Junction-to-board characterization parameter
20.6
θJCbot
Junction-to-case (bottom) thermal resistance
4.3
(1)
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
Copyright
© 2010–2011, Texas Instruments Incorporated


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