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TPS60204DGSRG4 Datasheet(PDF) 4 Page - Texas Instruments
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TPS60204DGSRG4 Datasheet(HTML) 4 Page - Texas Instruments
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REGULATED 3.3V, 100mA LOW RIPPLE CHARGE PUMP
LOW POWER DC/DC CONVERTERS
SLVS354A − FEBRUARY 2001 − REVISED SEPTEMBER 2001
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Positive terminal of the flying capacitor C1
Negative terminal of the flying capacitor C1
Positive terminal of the flying capacitor C2
Negative terminal of the flying capacitor C2
Device-enable input. Three operating modes can be programmed with the EN pin.
− EN = Low disables the device. Output and input are isolated in the shutdown.
− EN = High lets the device run from the internal oscillator.
− If an external clock signal is applied to the EN pin, the device is in syncmode and runs synchronized at the
frequency of the external clock signal.
Supply input. Bypass IN to GND with a capacitor of the same size as Co.
Low-battery detector input for the TPS60204. A low-battery warning is generated at the LBO pin when the voltage
on LBI drops below the threshold of 1.18 V. Connect LBI to GND if the low-battery detector function is not used. For
the TPS60205, this pin has to be connected to ground (GND pin).
Open-drain low-battery detector output for the TPS60204. This pin is pulled low if the voltage on LBI drops below
the threshold of 1.18 V. A pullup resistor should be connected between LBO and OUT or any other logic supply rail
that is lower than 3.6 V.
Open-drain power-good detector output for the TPS60205. As soon as the voltage on OUT reaches about 90% of
it is nominal value this pin goes active high. A pullup resistor should be connected between PG and OUT or any
other logic supply rail that is lower than 3.6 V.
Regulated 3.3-V power output. Bypass OUT to GND with the output filter capacitor Co.
The TPS6020x charge pumps provide a regulated 3.3-V output from a 1.8-V to 3.6-V input. They deliver up to
100-mA load current while maintaining the output at 3.3 V
±4%. Designed specifically for space critical battery
powered applications, the complete converter requires only four external capacitors. The device is using the
push-pull topology to achieve lowest output voltage ripple. The converter is also optimized for smallest board
space. It makes use of small sized capacitors, with the highest output current rating per output capacitance and
The TPS6020x circuits consist of an oscillator, a 1.18-V voltage reference, an internal resistive feedback circuit,
an error amplifier, two charge pump power stages with high current MOSFET switches, a shutdown/start-up
circuit, and a control circuit (see functional block diagrams).
push-pull operating mode
The two single-ended charge pump power stages operate in the so-called push-pull operating mode, i.e., they
operate with a 180
°C phase shift. Each single-ended charge pump transfers charge into its transfer capacitor
(C1 or C2) in one half of the period. During the other half of the period (transfer phase), the transfer capacitor
is placed in series with the input to transfer its charge to C
. While one single-ended charge pump is in the charge
phase, the other one is in the transfer phase. This operation assures an almost constant output current which
ensures a low output ripple.
If the clock were to run continuously, this process would eventually generate an output voltage equal to two times
the input voltage (hence the name voltage doubler). In order to provide a regulated fixed output voltage of 3.3 V,
the TPS6020x devices use either pulse-skip or constant-frequency linear-regulation control mode. The mode
is automatically selected based on the output current. If the load current is below the LinSkip current threshold,
it switches into the power-saving pulse-skip mode to boost efficiency at low output power.
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