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CAT872-40ULGT3 Datasheet(PDF) 7 Page - ON Semiconductor |
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CAT872-40ULGT3 Datasheet(HTML) 7 Page - ON Semiconductor |
7 / 9 page CAT871, CAT872 http://onsemi.com 7 APPLICATION INFORMATION Reset Pulse Operation When both MR1 and MR2 inputs are kept low, a single reset pulse is generated after the delay tLOW_DELAY. Even with both MR1 and MR2 maintained low continuously after that time, no second reset pulse will be generated. The delay timer restarts if either MR1 or MR2 (or both) input transitions from high to low, as shown in the timing diagram in Figure 13. System with Two Different Power Supply Voltages The reset generator can be used in a system where the supply VDD is different than the MR1, MR2 input logic. Figure 14 shows an application schematic where the microcontroller uses a supply VBAT (3.6 V) that is higher than the VDD rail (1.8 V). MR1 and MR2 inputs are activated here by two separate switches connected to GND and pulling the inputs low when pressed. The Schottky diode provides the supply isolation needed between the CAT871/CAT872 (VDD) and the microcontroller (VBAT). Operation with Low VDD Voltage and Brownout Condition The CAT871, CAT872 reset generators require a minimum supply voltage VDD of 1.65 V to guarantee the normal operation within the specification. To prevent small VDD supply glitch, a small ceramic capacitor can be added between the VDD pin and GND. Figure 13. Reset Timing Diagram Figure 14. Application Schematic in Dual Supply System |
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