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CAT3211 Datasheet(PDF) 10 Page - ON Semiconductor |
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CAT3211 Datasheet(HTML) 10 Page - ON Semiconductor |
10 / 14 page CAT3211 http://onsemi.com 10 Figure 14. Simplified Block Diagram BASIC OPERATION The CAT3211 contains six 8−bit registers controlled via the I2C interface. On power−up, these registers are set to their default values and can be modified to store the haptic pulse timing durations, the oscillator configuration settings, and the H−bridge regulator voltage levels in both haptic or vibrate modes. The internal haptic sequence generator is triggered on the rising edge of H_TRIG. This allows direct connection from a touch screen controller bypassing the CPU and improving latency time from key−press to mechanical user feedback. During the haptic mode, the voltage supply to the H−Bridge can be programmed from 2.0 V to 5.0 V or shorted to VIN via the LDOH register. This allows the motor to be safely overdriven for short durations, greatly increasing the user experience. The device can be configured to drive the motor for a standard incoming call by driving VIB_EN high. This mode can driven safely for extended times since the LDO regulated voltage to rotary motor can be programmed at safe voltage levels via LDOV register. The device can be fully shut down via the I2C interface to prevent external systems from triggering or enabling any modes by writing a zero into the CONFIG register CHIP_EN bit (B0). Haptic Mode Timers The internal oscillator for the haptic mode timers are selected by writing a zero into the OSC register EXT_OSC bit. Writing a one into the EXT_OSC bit allows an external oscillator to be used via OSC pin. The internal and external clock can be further divided from 1 time to 128 times by setting OSC_DIV_2, OSC_DIV_4 and OSC_DIV16 accordingly. The haptic pulse timers are configured via the HAPTIC_A and HAPTIC_B registers. Forward, Coast and Reverse timers can be configured from 0 to 30 clock cycles in 2 cycle increments. The Recovery timer can be configured from 0 to 60 clock cycles in 4 cycle increments. In order to prevent the motor from being overdriven in haptic mode for extended times, it is not possible to start a new haptic pulse unless the recovery time has elapsed. Protection The device includes over−current protection on all H−bridge switches to protect the POS and NEG pins from damage and stops the VIN supply from dipping due to excessive currents during fault conditions. The device is designed to handle the inductive currents in the rotor windings during direction transitions or power off conditions without affecting operation of the device. A 1 mF capacitor is required between REG and PGND to absorb these current spikes. In case the die temperature exceeds the thermal shutdown temperature (TSD) of 140°C typical, the CONFIG register TEMP_L bit (B3) is set to one automatically and permanently (latched) until RST goes low. This information can be retrieved by the system by reading the CONFIG register at a later time. The TEMP_L bit is read−only. Thermal shutdown and under−voltage lockout disable the device if abnormal conditions are detected and dynamically enable once the abnormal condition is removed. |
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Descripción similar - CAT3211 |
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