NIPPON PRECISION CIRCUITS-7

SM5906AF

Parameter

Symbol

Rating

Unit

Condition

Min

Typ

Max

YSCK pulsewidth (HIGH level)

75

ns

YSCK pulsewidth (LOW level)

75

ns

YSCK pulse cycle

150

ns

YSRDATA setup time

50

ns

YSRDATA hold time

50

ns

Last YSCK rising edge to YLRCK edge

50

ns

YLRCK edge to first YSCK rising edge

50

ns

0

4fs

Memory system ON

YLRCK pulse frequency

(MSON=H)

See note below.

fs

fs

Memory system OFF

(MSON=L)

YC2PO setup time

1

µs

YC2PO hold time

1

µs

Note. When the memory system is OFF (through mode), the input data rate is synchronized to the system clock input (384fs), so input

data needs to be at 1/384 of this frequency. But, this IC can tolerate a certain amount of jitter. For details, refer to Through-mode

operation.

YSCK

YSRDATA

YLRCK

BCY

t

DS

t

DH

t

BCWH

t

BCWL

t

LB

t

BL

t

YLRCK

YC2PO

Serial input (YSRDATA, YLRCK, YSCK YC2PO pins)