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FAN6757MRMX Datasheet(PDF) 7 Page - Fairchild Semiconductor |
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FAN6757MRMX Datasheet(HTML) 7 Page - Fairchild Semiconductor |
7 / 17 page © 2013 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN6757 • Rev. 1.0.1 7 Electrical Characteristics VDD=15 V and TJ=TA=25C unless otherwise noted. Symbol Parameter Conditions Min. Typ. Max. Unit GATE Section DCYMAX Maximum Duty Cycle 75.0 82.5 90.0 % VGATE-L Gate Low Voltage VDD=15 V, IO=50 mA 1.5 V VGATE-H Gate High Voltage VDD=12 V, IO=50 mA 8 V tr Gate Rising Time (10~90%) VDD=15 V, CL=1 nF 85 110 135 ns tf Gate Falling Time (10~90%) VDD=15 V, CL=1 nF 30 40 50 ns VGATE-CLAMP Gate Output Clamping Voltage VDD=22 V 11.0 14.5 18.0 V RT Section IRT Output Current of RT Pin 100 µA VRTTH1 Threshold Voltage, Latch Protection (Generally Used for External OTP Triggering) VRTTH2< VRT <VRTTH1, After 14.5 ms Latch Off 1.000 1.035 1.070 V VRTTH2 Second Latch Protection Threshold Voltage VRTTH2 < 0.7 V, After 185 µs Latch Off 0.65 0.70 0.75 V ROTP Value of VRTTH1/IRT 9.66 10.50 11.34 kΩ tD-OTP1 Debounce Time, First Latch Protection Triggering VRTTH2 < VRT < VRTTH1 11.0 14.5 18.0 ms tD-OTP2 Debounce Time, Second Latch Protection Triggering VRT< VRTTH2 110 185 260 µs Over-Temperature Protection Section (OTP) TOTP Protection Junction Temperature +135 °C TRESTART Restart Junction Temperature TOTP- 25 °C |
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