TPA3250D2

SLASE99 – DECEMBER 2015

www.ti.com

7.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

TYP

MAX

UNIT

PVDD_x

Half-bridge supply

DC supply voltage

12

32

38

V

Supply for logic regulators and gate-drive

GVDD_x

DC supply voltage

10.8

12

13.2

V

circuitry

VDD

Digital regulator supply voltage

DC supply voltage

10.8

12

13.2

V

2.7

4

Output filter inductance within

Load impedance

1.5

3

Ω

recommended value range

1.6

2

5

Output filter inductance

5

μH

5

Nominal

430

450

470

PWM frame rate selectable for AM

interference avoidance; 1% Resistor

AM1

475

500

525

kHz

tolerance

AM2

575

600

625

Nominal; Master mode

29.7

30

30.3

PWM frame rate programming resistor

AM1; Master mode

19.8

20

20.2

k

Ω

AM2; Master mode

9.9

10

10.1

PVDD close decoupling capacitors

1.0

μF

Over-current programming resistor

Resistor tolerance = 5%

22

30

k

Ω

Over-current programming resistor

Resistor tolerance = 5%

47

64

k

Ω

Voltage on FREQ_ADJ pin for slave

Slave mode

3.3

V

mode operation

Junction temperature

0

125

°C

7.4 Thermal Information

TPA3250D2

DDV 44-PINS HTSSOP

UNIT

JEDEC STANDARD 4 LAYER PCB

Junction-to-ambient thermal resistance

26.0

°C/W

Junction-to-case (top) thermal resistance

10.2

°C/W

Junction-to-board thermal resistance

6.5

°C/W

Junction-to-top characterization parameter

0.2

°C/W

Junction-to-board characterization parameter

6.5

°C/W

Junction-to-case (bottom) thermal resistance

1.4

°C/W

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6

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