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AD5721RBCPZ-RL7 Datasheet(PDF) 2 Page - Analog Devices

No. de pieza AD5721RBCPZ-RL7
Descripción Electrónicos  Multiple Range, 16-/12-Bit, Bipolar/Unipolar Voltage Output DACs with 2 ppm/째C Reference
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD5721RBCPZ-RL7 Datasheet(HTML) 2 Page - Analog Devices

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AD5761R/AD5721R
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
AC Performance Characteristics ................................................ 6
Timing Characteristics ................................................................ 7
Timing Diagrams.......................................................................... 7
Absolute Maximum Ratings............................................................ 9
ESD Caution.................................................................................. 9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characterstics............................................. 12
Terminology .................................................................................... 23
Theory of Operation ...................................................................... 25
Digital-to-Analog Converter .................................................... 25
Transfer Function ....................................................................... 25
DAC Architecture....................................................................... 25
Serial Interface ............................................................................ 26
Hardware Control Pins.............................................................. 26
Thermal Hysteresis .................................................................... 27
Register Details ............................................................................... 28
Input Shift Register .................................................................... 28
Control Register ......................................................................... 29
Readback Control Register ....................................................... 30
Update DAC Register from Input Register............................. 31
Readback DAC Register ............................................................ 31
Write and Update DAC Register.............................................. 31
Readback Input Register............................................................ 32
Disable Daisy-Chain Functionality.......................................... 32
Software Data Reset ................................................................... 32
Software Full Reset..................................................................... 33
No Operation Registers ............................................................. 33
Applications Information .............................................................. 34
Typical Operating Circuit ......................................................... 34
Power Supply Considerations................................................... 34
Evaluation Board ........................................................................ 34
Outline Dimensions....................................................................... 35
Ordering Guide .......................................................................... 35
REVISION HISTORY
5/15—Rev. 0 to Rev. A
Added LFCSP Package.......................................................Universal
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 6
Changes to Table 4............................................................................ 9
Added Figure 6 and Table 6; Renumbered Sequentially ........... 11
Changes to Figure 21 to Figure 24................................................ 14
Changes to Figure 35...................................................................... 16
Changes to Figure 37...................................................................... 17
Changes to Figure 50...................................................................... 19
Changes to Figure 58 to Figure 60................................................ 20
Changes to Figure 61 to Figure 66................................................ 21
Changes to Figure 69...................................................................... 22
Added Figure 71 ............................................................................. 22
Changes to Terminology Section ................................................. 23
Changes to Digital-to-Analog Converter Section and Internal
Reference Section ........................................................................... 25
Changes to Asynchronous Clear Function (CLEAR) Section...... 27
Changes to Table 12 ....................................................................... 29
Changes to Power Supply Considerations Section and
Figure 77 .......................................................................................... 34
Added Figure 79 ............................................................................. 35
Updated Outline Dimensions....................................................... 35
Changes to Ordering Guide.......................................................... 35
11/14—Revision 0: Initial Version
Rev. A | Page 2 of 35


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