SI53304 datasheet(3/33 Pages) SILABS

No. de pieza	SI53304

Descripción Electrónicos	1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR WITH 2:1 INPUT MUX AND INDIVIDUAL OE

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Si53304

Rev. 1.0

3

1. Electrical Specifications

Table 1. Recommended Operating Conditions

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Ambient Operating

Temperature

TA

–40

—

85

°C

Supply Voltage Range*

VDD

LVDS, CML

1.71

1.8

1.89

V

2.38

2.5

2.63

V

2.97

3.3

3.63

V

LVPECL, low power LVPECL,

LVCMOS

2.38

2.5

2.63

V

2.97

3.3

3.63

V

HCSL

2.97

3.3

3.63

V

Output Buffer Supply

Voltage*

VDDOX

LVDS, CML, LVCMOS

1.71

1.8

1.89

V

2.38

2.5

2.63

V

2.97

3.3

3.63

V

LVPECL, low power LVPECL

2.38

2.5

2.63

V

2.97

3.3

3.63

V

HCSL

2.97

3.3

3.63

V

*Note:

Core supply VDD and output buffer supplies VDDO are independent. LVCMOS clock input is not supported for VDD =

1.8V but is supported for LVCMOS clock output for

VDDOX = 1.8V. LVCMOS outputs at 1.5V and 1.2V can be

supported via a simple resistor divider network. See “2.9.1. LVCMOS Output Termination To Support 1.5V and 1.2V”

Table 2. Input Clock Specifications

(VDD=1.8 V  5%, 2.5 V  5%, or 3.3 V  10%, TA=–40 to 85 °C)

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Differential Input Common

Mode Voltage

VCM

VDD =2.5 V 5%, 3.3 V 10%

0.05

—

V

Differential Input Swing

(peak-to-peak)

VIN

0.2

—

2.2

V

LVCMOS Input High Volt-

age

VIH

VDD =2.5 V 5%, 3.3 V 10%

VDD x 0.7

—

V

LVCMOS Input Low Volt-

age

VIL

VDD =2.5 V 5%, 3.3 V 10%

—

VDD x

0.3

V

Input Capacitance

CIN

CLK0 and CLK1 pins with

respect to GND

—5

—

pF

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