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DLPA3000CPFDR Datasheet(PDF) 8 Page - Texas Instruments

No. de pieza DLPA3000CPFDR
Descripción Electrónicos  PMIC and High-Current LED Driver IC
Download  75 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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DLPA3000CPFDR Datasheet(HTML) 8 Page - Texas Instruments

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DLPA3000
DLPS052 – OCTOBER 2015
www.ti.com
6.2 ESD Ratings
VALUE
UNIT
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(2)
±2000
V(ESD)
(1)
Electrostatic discharge
V
Charged-device model (CDM), per JEDEC specification JESD22-C101,
±500
all pins(3)
(1)
Electrostatic discharge (ESD) to measure device sensitivity and immunity to damage caused by assembly line electrostatic discharges in
to the device.
(2)
JEDEC document JEP155 states that 500 V HBM allows safe manufacturing with a standard ESD control process.
(3)
JEDEC document JEP157 states that 250 V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
PWR_VIN, PWR1,2,3,4,5,6,7_VIN, VINA, ILLUM_VIN,
6
20
ILLUM_A,B_VIN, DRST_VIN
CH1,2,3_SWITCH, ILLUM_A,B_FB,
–0.1
6.3
INT_Z, PROJ_ON
–0.1
6
PWR1,2,5,6,7_FB
–0.1
5
ACMPR_REF, CH_SEL_0,1, SPI_CLK, SPI_MOSI,
–0.1
3.6
VI
Input voltage
V
SPI_SS_Z
RLIM_BOT_K_1,2
–0.1
0.1
ACMPR_IN_1,2,3, LABB_IN_LABB
–0.1
1.5
SPI_VIN
1.7
3.6
RLIM_K_1,2
–0.1
0.25
ILLUM_A,B_COMP1,2
–0.1
5.7
TA
Ambient temperature
0
70
°C
TJ
Operating junction temperature
0
120
°C
6.4 Thermal Information
DLPA3000
THERMAL METRIC(1)
HTQFP (PFD)
UNIT
100 PINS
RθJA
Junction-to-ambient thermal resistance (2)
7.0
°C/W
RθJC(top)
Junction-to-case (top) thermal resistance (3)
0.7
°C/W
ψJT
Junction-to-top characterization parameter (4)
0.6
°C/W
ψJB
Junction-to-board characterization parameter (5)
3.4
°C/W
(1)
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report (SPRA953).
(2)
The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, but
since the device is intended to be cooled with a heatsink from the top case of the package, the simulation includes a fan and heatsink
attached to the DLPA3000. The heatsink is a 22 mm × 22 mm × 12 mm aluminum pin fin heatsink with a 12 × 12 × 3 mm stud. Base
thickness is 2 mm and pin diameter is 1.5 mm with an array of 6 × 6 pins. The heatsink is attached to the DLPA3000 with 100 um thick
thermal grease with 3 W/m-K thermal conductivity. The fan is 20 × 20 × 8 mm with 1.6 cfm open volume flow rate and 0.22 in. water
pressure at stagnation.
(3)
The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC standard
test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4)
The junction-to-top characterization parameter,
ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining R
θJA, using a procedure described in JESD51-2a (sections 6 and 7), but modified to include the
fan and heatsink described in note 2.
(5)
The junction-to-board characterization parameter,
ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining R
θJA, using a procedure described in JESD51-2a (sections 6 and 7), but modified to include the
fan and heatsink described in note 2.
8
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