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ADS5474IPFPRG4 Datasheet(PDF) 5 Page - Texas Instruments |
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ADS5474IPFPRG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 41 page ADS5474 www.ti.com SLAS525C – JULY 2007 – REVISED JANUARY 2016 Pin Functions (continued) PIN DESCRIPTION NAME NO. TYPE D1 50 D1 49 D2 54 D2 53 D3 56 D3 55 D4 58 D4 57 D5 60 D5 59 D6 62 D6 61 O LVDS digital output pairs D7 64 D7 63 D8 68 D8 67 D9 70 D9 69 D10 72 D10 71 D11 74 D11 73 D12 76 D12 75 D13 78 O LVDS digital output pair, most significant bit (MSB) D13 77 DRY 80 O Data ready LVDS output pair DRY 79 4 - No connection (pins 4 and 5 should be left floating) 5 43 NC 44 No connection (pins 43 to 46 are possible future bit additions for this pinout and therefore can - be connected to a digital bus or left floating) 45 46 OVR 42 Overrange indicator LVDS output. A logic high signals an analog input in excess of the full- O scale range. OVR 41 Common-mode voltage output (3.1 V nominal). Commonly used in DC-coupled applications to set the input signal to the correct common-mode voltage. A 0.1- μF capacitor from VCM to VCM 29 O AGND is recommended, but not required. (This pin is not used on the ADS5440, ADS5444, and ADS5463) Power-down (active high). Device is in sleep mode when PWD pin is logic HIGH. ADC PWD 33 converter is awake when PWD is logic LOW (grounded). (This pin is not used on the ADS5440, ADS5444, and ADS5463) Reference voltage input/output (2.4 V nominal). A 0.1- μF capacitor from VREF to AGND is VREF 6 recommended, but not required. (not (Power Pad) Power Pad for thermal relief, also Analog Ground numbered) Copyright © 2007–2016, Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Links: ADS5474 |
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