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TPD12S521DBTR Datasheet(PDF) 10 Page - Texas Instruments |
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TPD12S521DBTR Datasheet(HTML) 10 Page - Texas Instruments |
10 / 19 page 10 TPD12S521 SLVS639F – OCTOBER 2007 – REVISED FEBRUARY 2016 www.ti.com Product Folder Links: TPD12S521 Submit Documentation Feedback Copyright © 2007–2016, Texas Instruments Incorporated 9.2.2 Detailed Design Procedure To begin the design process the designer needs to know the 5V_SUPPLY voltage range and the logic level, LV_SUPPLY, voltage range. 9.2.3 Application Curves Figure 3. HDMI 1.65Gbps Eye Diagram With TPD12S521 on a Test Board Figure 4. HDMI 1.65Gbps Eye Diagram Without TPD12S521 on a Test Board Figure 5. Test Board to Measure Eye Diagram for the TPD12S521 (Refer to Eye Diagram Plot) 10 Power Supply Recommendations The designer needs to consider the requirement for the HDMI Transmitters Hot Plug Detect (HPD) scheme. If it is a requirement, then the VIH of HPD on the core scalar chip is the minimum voltage needed to detect a Hot Plug event. The minimum voltage requirement is V5V_SUPPLY — VDROP_MAX — VDROP_SYSTEM — VON_MAX > VIH ⇒ V5V_SUPPLY > VIH + VDROP_MAX + VDROP_SYSTEM + VON_MAX ; where VDROP_MAX is the maximum voltage drop across TPD12S521's current limiter, VDROP_SYSTEM is the voltage drop across the path from Pin 38 of TPD12S521 through the sink and back to Pin 20, and VON_MAX is the maximum voltage drop across TPD12S521's level shifting NFET when ON. Otherwise, TPD12S521 is a passive ESD protection device and there is no need to power it. |
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