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TPD7S019 Datasheet(PDF) 10 Page - Texas Instruments |
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TPD7S019 Datasheet(HTML) 10 Page - Texas Instruments |
10 / 21 page TPD7S019 SLLSE33C – AUGUST 2010 – REVISED NOVEMBER 2015 www.ti.com 8.2.2 Detailed Design Procedure To begin the design process, some parameters must be decided upon; the designer should make sure: • Voltage range on the protected line must not exceed the reverse standoff voltage of the TVS diode(s) (VRWM) • Operating frequency is supported by the I/O capacitance CIO of the TVS diode • IEC 61000-4-2 protection requirement is covered by the IEC performance of the TVS diode For this application, the DDC signals will switch between 0 V and 5 V (with resistor pulling it up to 5-V power supply). The VIDEO and SYNC signal levels are between 0 V and VCC_VIDEO / VCC_SYNC. All signals are not exceeding the recommended values and the ESD cells on these pins will stay untriggered. Depending on the resolution and the refresh rate of the display, the VIDEO (RGB) signals' bandwidth can be from 24 MHz to 388MHz. The line capacitances from the ESD cells are 2.5 pF typical which is only takes up a small portion of the total capacitance budget for the maximum frequency in this range. ±8-kV Contact ESD provided by TPD7S019 meets the ESD design goal of ±8 kV contact. Put 1.5-k Ω to 2-kΩ pullup resistor on the DDC lines to be compliant with the I2C standard. Termination resistors on VIDEO lines are 50 Ω to 75 Ω to match the impedance on board trace. 8.2.3 Application Curves Figure 7. IEC 61000-4-2 Clamping Voltage, Positive Figure 8. IEC 61000-4-2 Clamping Voltage, Negative Contact Contact 9 Power Supply Recommendations TPD7S019 has three power supply pins: VCC_DDC, VCC_SYNC and VCC_VIDEO. Depending on the system, the recommended voltage level of these three power supplies can be as high as 5.5 V. 10 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: TPD7S019 |
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