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TS51221-M015QFNR Datasheet(PDF) 7 Page - Semtech Corporation

No. de pieza TS51221-M015QFNR
Descripción Electrónicos  High Efficiency Regulator IC for Wireless Power Receiver Applications
Download  18 Pages
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Fabricante Electrónico  SEMTECH [Semtech Corporation]
Página de inicio  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

TS51221-M015QFNR Datasheet(HTML) 7 Page - Semtech Corporation

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TS51221
Final Datasheet
Rev 1.1
April 6, 2015
www.semtech.com
7 of 18
Semtech
Functional Description
TheTS51221wirelesspowerreceiverdeviceisaswitching
converterthatincludesflexibilitytobeusedforawiderange
ofinputvoltagesandisoptimizedforhighefficiencypower
conversionwithlowR
DSONintegratedsynchronousswitches.A
1MHzinternalswitchingfrequencyfacilitateslowcostLCfilter
combinations.Additionally,thefixedoutputversionsenable
aminimumexternalcomponentcounttoprovideacomplete
regulationsolutionwithonly4externalcomponents:aninput
bypasscapacitor,aninductor,anoutputcapacitor,andthe
bootstrapcapacitor.
Detailed Pin Descripttion
Unregulated input, VCC
Thisterminalistheunregulatedinputvoltagesourcefrom
therectifiedreceivercoilvoltage.Itisrecommendedthata
10uFbypasscapacitorbeplacedclosetothedeviceforbest
performance.SincethisisalsothemainsupplyfortheIC,
goodlayoutpracticesneedtobefollowedforthisconnection.
Bootstrap control, BST
Thisterminalwillprovidethebootstrapvoltagerequiredfor
theupperinternalNMOSswitchofthebuckregulator.An
externalceramiccapacitorplacedbetweentheBSTinput
terminalandtheVSWpinwillprovidethenecessaryvoltage
fortheupperswitch.Innormaloperationthecapacitoris
re-chargedoneverylowsidesynchronousswitchingaction.
Inthecaseofwheretheswitchmodeapproaches100%duty
cycleforthehighsideFET,thedevicewillautomaticallyreduce
thedutycycleswitchtoaminimumofftimeonevery8thcycle
toallowthiscapacitortore-charge.
Sense feedback, FB
Thisistheinputterminalfortheoutputvoltagefeedback.
Forthefixedmodeversions,thisshouldbehookeddirectly
toV
OUT.TheconnectiononthePCBshouldbekeptasshort
aspossible,andshouldbemadeascloseaspossibletothe
capacitor.Thetraceshouldnotbesharedwithanyother
connection.(Figure23)
Foradjustablemodeversions,thisshouldbeconnectedto
theexternalresistordivider.Tochoosetheresistors,usethe
followingequation:
VOUT=0.9(1+RTOP/RBOT)
TheinputtotheFBpinishighimpedance,andinputcurrent
shouldbelessthan100nA.Asaresult,goodlayoutpractices
arerequiredforthefeedbackresistorsandfeedbacktraces.
Whenusingtheadjustableversion,thefeedbacktraceshould
bekeptasshortaspossibleandminimumwidthtoreduce
straycapacitanceandtoreducetheinjectionofnoise.
Fortheadjustableversion,theratioofVCC/VOUTcannotexceed
16.
Switching output, VSW
Thisistheswitchingnodeoftheregulator.Itshouldbe
connecteddirectlytothe4.7uHinductorwithawide,short
traceandtooneendoftheBootstrapcapacitor.Itisswitching
betweenVCCandPGNDattheswitchingfrequency.
Ground, GND
Thisgroundisusedforthemajorityofthedeviceincludingthe
analogreference,controlloop,andothercircuits.
Power Ground, PGND
Thisisaseparategroundconnectionusedforthelowside
synchronousswitchtoisolateswitchingnoisefromtherestof
thedevice.(Figure23)
Enable, high-voltage, EN
Thisistheinputterminaltoactivatetheregulator.Theinput
thresholdisTTL/CMOScompatible.Italsohasaninternalpull-
uptoensureastablestateifthepinisdisconnected.
Power Good Output, PG
Thisisanopendrain,activelowoutput.Theswitchedmode
outputvoltageismonitoredandthePGlinewillremainlow
untiltheoutputvoltagereachestheVOUT-UVthreshold.Once
theinternalcomparatordetectstheoutputvoltageisabove
thedesiredthreshold,aninternaldelaytimerisactivatedand
thePGlineisde-assertedtohighoncethisdelaytimerexpires.
IntheeventtheoutputvoltagedecreasesbelowVOUT-UV,the
PGlinewillbeassertedlowandremainlowuntiltheoutput
risesaboveVOUT-UVandthedelaytimertimesout.SeeFigure2
forthecircuitschematicforthePGsignal.


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