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AD6649EBZ Datasheet(PDF) 4 Page - Analog Devices |
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AD6649EBZ Datasheet(HTML) 4 Page - Analog Devices |
4 / 40 page AD6649 Data Sheet Rev. C | Page 4 of 40 SPECIFICATIONS ADC DC SPECIFICATIONS AVDD = 1.8 V, DRVDD = 1.8 V, maximum sample rate, VIN = −1.0 dBFS differential input,1 1.75 V p-p full-scale input range, duty cycle stabilizer (DCS) enabled, NCO enabled, FIR filter enabled, unless otherwise noted. Table 1. Parameter Temperature Min Typ Max Unit RESOLUTION Full 14 Bits ACCURACY No Missing Codes Full Guaranteed Offset Error Full ±10 mV Gain Error Full −5.5 +2.5 %FSR MATCHING CHARACTERISTIC Offset Error Full ±13 mV Gain Error Full ±2.5 %FSR TEMPERATURE DRIFT Offset Error Full ±5 ppm/°C Gain Error Full ±100 ppm/°C INPUT REFERRED NOISE VREF = 1.75 V 25°C 1.32 LSB rms ANALOG INPUT Input Span Full 1.75 V p-p Input Capacitance2 Full 2.5 pF Input Resistance3 Full 20 kΩ Input Common-Mode Voltage Full 0.9 V POWER SUPPLIES Supply Voltage AVDD Full 1.7 1.8 1.9 V DRVDD Full 1.7 1.8 1.9 V Supply Current IAVDD4 Full 271 275 mA IDRVDD4 (Fixed-Frequency NCO, 95 MHz FIR Filter) Full 283 300 mA IDRVDD4 (Tunable-Frequency NCO, 100 MHz FIR Filter) Full 375 mA POWER CONSUMPTION Sine Wave Input (Fixed-Frequency NCO, 95 MHz FIR Filter) Full 997 1035 mW Sine Wave Input (Tunable-Frequency NCO, 100 MHz FIR Filter) Full 1163 mW Standby Power5 Full 104 mW Power-Down Power Full 10 mW 1 A −1.0 dBFS input level at the analog inputs corresponds to an output level of −2.5 dBFS when using the fixed-frequency NCO and 95 MHz FIR filter. When using the tunable-frequency NCO and 100 MHz FIR filter, the output level is −1.3 dBFS. These respective output level reductions are due to FIR filter losses. See the FIR Filters section for more details. 2 Input capacitance refers to the effective capacitance between one differential input pin and AGND. 3 Input resistance refers to the effective resistance between one differential input pin and its complement. 4 Measured with a 185 MHz, full-scale sine wave input on both channels and an NCO frequency of 62.5 MHz (fS/4). 5 Standby power is measured with a dc input and the CLK pin inactive (set to AVDD or AGND). |
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