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ADAU1450WBCPZ Datasheet(PDF) 1 Page - Analog Devices |
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ADAU1450WBCPZ Datasheet(HTML) 1 Page - Analog Devices |
1 / 180 page SigmaDSP Digital Audio Processor Data Sheet ADAU1452/ADAU1451/ADAU1450 FEATURES Qualified for automotive applications Fully programmable audio DSP for enhanced sound processing Features SigmaStudio, a proprietary graphical programming tool for the development of custom signal flows Up to 294.912 MHz, 32-bit SigmaDSP core at 1.2V Up to 6144 SIMD instructions per sample at 48 kHz Up to 40 kWords of parameter/data RAM Up to 800 ms digital audio delay pool at 48 kHz Audio I/O and routing 4 serial input ports, 4 serial output ports 48-channel, 32-bit digital I/O up to a sample rate of 192 kHz Flexible configuration for TDM, I2S, left and right justified formats, and PCM Up to 8 stereo ASRCs from 1:8 up to 7.75:1 ratio and 139 dB DNR Stereo S/PDIF input and output (not on the ADAU1450) Four PDM microphone input channels Multichannel, byte addressable TDM serial ports Clock oscillator for generating master clock from crystal Integer PLL and flexible clock generators Integrated die temperature sensor I2C and SPI control interfaces (both slave and master) Standalone operation Self boot from serial EEPROM 6-channel, 10-bit SAR auxiliary control ADC 14 multipurpose pins for digital controls and outputs On-chip regulator for generating 1.2 V from 3.3 V supply 72-lead, 10 mm × 10 mm LFCSP package with 5.3 mm exposed pad Temperature range: −40°C to +105°C APPLICATIONS Automotive audio processing Head units Navigation systems Rear seat entertainment systems DSP amplifiers (sound system amplifiers) Commercial and professional audio processing FUNCTIONAL BLOCK DIAGRAM—ADAU1452/ADAU1451 S/PDIF TRANSMITTER S/PDIF RECEIVER 8 × 2-CHANNEL ASYNCHRONOUS SAMPLE RATE CONVERTERS INPUT CLOCK DOMAINS (×4) OUTPUT CLOCK DOMAINS (×4) CLOCK OSCILLATOR GPIO/ AUX ADC PLL I2C/SPI SLAVE SPI/I2C* BCLK_IN3 TO BCLK_IN0/ LRCLK_IN3 TO LRCLK_IN0 (INPUT CLOCK PAIRS) SPDIFIN SPDIFOUT CLKOUT SDATA_IN3 TO SDATA_IN0 (48-CHANNEL DIGITAL AUDIO INPUTS) SDATA_OUT3 TO SDATA_OUT0 (48-CHANNEL DIGITAL AUDIO OUTPUTS) REGULATOR ADAU1452/ ADAU1451 PLLFILT BCLK_OUT3 TO BCLK_OUT0 LRCLK_OUT3 TO LRCLK_OUT0 (OUTPUT CLOCK PAIRS) TEMPERATURE SENSOR THD_P VDRIVE THD_M I2C/SPI MASTER SPI/I2C* DIGITAL MIC INPUT SERIAL DATA INPUT PORTS (×4) SERIAL DATA OUTPUT PORTS (×4) DEJITTER AND CLOCK GENERATOR *SPI/I2C INCLUDES THE FOLLOWING PIN FUNCTIONS: SS_M, MOSI_M, SCL_M, SCLK_M, SDA_M, MISO_M, MISO, SDA, SCLK, SCL, MOSI, ADDR1, SS, AND ADDR0 PINS. INPUT AUDIO ROUTING MATRIX OUTPUT AUDIO ROUTING MATRIX 294.912MHz2 PROGRAMMABLE AUDIO PROCESSING CORE RAM, ROM, WATCHDOG, MEMORY PARITY CHECK Figure 1. Rev. C Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2013–2014 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com |
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