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TPS560200DBVR Datasheet(HTML) 8 Page - Texas Instruments
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SLVSC81C – SEPTEMBER 2013 – REVISED FEBRUARY 2016
Product Folder Links: TPS560200
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Copyright © 2013–2016, Texas Instruments Incorporated
Feature Description (continued)
7.3.2 PWM Frequency and Adaptive On-Time Control
TPS560200 uses an adaptive on-time control scheme and does not have a dedicated on board oscillator. The
TPS560200 runs with a pseudo-constant frequency of 600 kHz by using the input voltage and output voltage to
set the on-time, one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the
output voltage; therefore, when the duty ratio is VOUT/VIN, the frequency is constant.
7.3.3 Advanced Auto-Skip Eco-Mode Control
The TPS560200 is designed with advanced auto-skip Eco-Mode to increase higher light-load efficiency. As the
output current decreases from heavy-load condition, the inductor current is also reduced. If the output current is
reduced enough, the inductor current ripple valley reaches the zero level, which is the boundary between
continuous conduction and discontinuous conduction modes. The rectifying low-side MOSFET is turned off when
its zero inductor current is detected. As the load current further decreases the converter run into discontinuous
conduction mode. The on-time is kept approximately the same as is in continuous conduction mode. The off-time
increases as it takes more time to discharge the output capacitor to the level of the reference voltage with
smaller load current. The transition point to the light load operation I
current can be calculated in
7.3.4 Soft-Start and Prebiased Soft-Start
The TPS560200 has an internal 2-ms soft-start. When the EN pin becomes high, internal soft-start function
begins ramping up the reference voltage to the PWM comparator.
The TPS560200 contains a unique circuit to prevent current from being pulled from the output during start-up if
the output is prebiased. When the soft-start commands a voltage higher than the prebias level (internal soft-start
becomes greater than feedback voltage V
), the controller slowly activates synchronous rectification by
starting the first low-side FET gate driver pulses with a narrow on-time. It then increments that on-time on a
cycle-by-cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter.
This scheme prevents the initial sinking of the prebias output, and ensure that the out voltage (V
) starts and
ramps up smoothly into regulation and the control loop is given time to transition from prebiased start-up to
normal mode operation.
7.3.5 Current Protection
The output overcurrent protection (OCP) is implemented using a cycle-by-cycle valley detect control circuit. The
switch current is monitored by measuring the low-side FET switch voltage between the PH pin and GND. This
voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature
During the on-time of the high-side FET switch, the switch current increases at a linear rate determined by V
, the on-time and the output inductor value. During the on time of the low-side FET switch, this current
decreases linearly. The average value of the switch current is the load current Iout. The TPS560200 constantly
monitors the low-side FET switch voltage, which is proportional to the switch current, during the low-side on-time.
If the measured voltage is above the voltage proportional to the current limit, an internal counter is incremented
per each switching cycle and the converter maintains the low-side switch on until the measured voltage is below
the voltage corresponding to the current limit at which time the switching cycle is terminated and a new switching
cycle begins. In subsequent switching cycles, the on-time is set to a fixed value and the current is monitored in
the same manner.
There are some important considerations for this type of overcurrent protection. The peak current is the average
load current plus one half of the peak-to-peak inductor current. The valley current is the average load current
minus one half of the peak-to-peak inductor current. Because the valley current is used to detect the overcurrent
threshold, the load current is higher than the overcurrent threshold. Also, when the current is being limited, the
output voltage tends to fall as the demanded load current may be higher than the current available from the
converter. This protection is nonlatching. When the VSENSE voltage becomes lower than 63% of the target
voltage, the UVP comparator detects it. After 7 µs detecting the UVP voltage, device shuts down and re-starts
after hiccup time.
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