LM25037MTX datasheet(5/37 Pages) TI1

No. de pieza	LM25037MTX

Descripción Electrónicos	Dual-Mode PWM Controller With Alternating Outputs

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Fabricante Electrónico	TI1 [Texas Instruments]

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LM25037, LM25037-Q1

www.ti.com

SNVS572E – JULY 2008 – REVISED JANUARY 2016

6.5 Thermal Information

LM25037/LM25037-Q1

THERMAL METRIC(1)

PW (TSSOP)

UNIT

16 PINS

RθJA

Junction-to-ambient thermal resistance

99.9

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

32.6

°C/W

RθJB

Junction-to-board thermal resistance

45.8

°C/W

ψJT

Junction-to-top characterization parameter

2

°C/W

ψJB

Junction-to-board characterization parameter

45.1

°C/W

RθJC(bot)

Junction-to-case (bottom) thermal resistance

N/A

°C/W

(1)

For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report, SPRA953.

6.6 Electrical Characteristics

VVIN = 12V, VVCC = 10V, RRT1 = 30.1 kΩ, RRT2 = 30.1 kΩ, VUVLO = 3 V, TJ =−40°C to +125° unless otherwise stated.

(1) (2)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

START-UP REGULATOR (VCC PIN)

VVCC

VCC voltage

IVCC = 10 mA

7.2

7.7

8.1

V

IVCC(Lim)

VCC current limit

VVCC = 7 V

20

mA

VCC Undervoltage threshold

4.6

5

5.4

V

VVCC(UV)

Hysteresis

0.5

V

IVIN

Start-up regulator current

VVIN = 20 V, VUVLO = 0 V

35

58

µA

VVIN = 75 V, VUVLO = 0 V

45

80

µA

Supply current into VCC from Outputs and COMP open, VVCC = 10 V, Outputs

4

mA

external source

switching

VOLTAGE REFERENCE REGULATOR (REF PIN)

REF Voltage

IREF = 0 mA

4.75

5

5.15

V

VREF

REF Voltage Regulation

IREF = 0 to 2.5 mA

7

25

mV

REF Current Limit

VREF = 4.5 V

5

10

mA

IREF(Lim)

VREF Undervoltage

3.7

4

4.3

V

threshold

VREF(UV)

Hysteresis

0.4

V

UNDERVOLTAGE LOCKOUT AND SHUTDOWN (UVLO PIN)

VUVLO

Undervoltage threshold

1.20

1.25

1.295

V

Hysteresis current

UVLO pin sinking

17

22

26

µA

Undervoltage shutdown

IUVLO

UVLO voltage rising

0.35

0.45

0.6

V

threshold

Hysteresis

0.1

V

CURRENT SENSE INPUT (CS PIN)

Current limit threshold

0.22

0.255

0.29

V

VCS

CS from 0 V to 1 V. Time for OUTA and OUTB to

CS delay to output

27

ns

fall to 90% of VCC. Output load = 0 pF.

Leading edge blanking time

65

ns

at CS

CS sink impedance (clocked)

Internal FET sink impedance

21

45

Ω

(1)

All limits are ensured. All electrical characteristics having room temperature limits are tested during production at TA = 25°C. All hot and

cold limits are ensured by correlating the electrical characteristics to process and temperature variations and applying statistical process

control.

(2)

Typical specifications represent the most likely parametric norm at 25°C operation.

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