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TPS65150PWP Datasheet(PDF) 34 Page - Texas Instruments

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No. de Pieza. TPS65150PWP
Descripción  Low Input Voltage, Compact LCD Bias IC
Descarga  47 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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TPS65150PWP Datasheet(HTML) 34 Page - Texas Instruments

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TPS65150
SLVS576B – SEPTEMBER 2005 – REVISED JANUARY 2016
www.ti.com
9 Power Supply Recommendations
The TPS65150 device is designed to operate with input supplies from 1.8 V to 6 V. Like most integrated circuits,
the input supply should be stable and free of noise if the device's full performance is to be achieved. If the input
is located more than a few centimeters away from the device, additional bulk capacitance may be required. The
input capacitance shown in the application schematics in this data sheet is sufficient for typical applications.
10 Layout
10.1 Layout Guidelines
The PCB layout is an important step in the power supply design. An incorrect layout could cause converter
instability, load regulation problems, noise, and EMI issues. Especially with a switching DC-DC converter at high
load currents, too-thin PCB traces can cause significant voltage spikes. Good grounding is also important. If
possible, TI recommends using a common ground plane to minimize ground shifts between analog ground
(GND) and power ground (PGND). Additionally, the following PCB design layout guidelines are recommended for
the TPS65150 device:
1. Boost converter output capacitor, input capacitor and Power ground (PGND) should form a star ground or
should be directly connected together on a common power ground plane.
2. Place the input capacitor directly from the input pin (VIN) to ground.
3. Use a bold PCB trace to connect SUP to the output Vs.
4. Place a small bypass capacitor from the SUP pin to ground.
5. Use short traces for the charge-pump drive pins (DRVN, DRVP) of VGH and VGL because these traces
carry switching currents.
6. Place the charge pump flying capacitors as close as possible to the DRVP and DRVN pin, avoiding a high
voltage spikes at these pins.
7. Place the Schottky diodes as close as possible to the device and to the flying capacitors connected to DRVP
and DRVN.
8. Carefully route the charge pump traces to avoid interference with other circuits because they carry high
voltage switching currents .
9. Place the output capacitor of the VCOM buffer as close as possible to the output pin (VCOM).
10. The thermal pad must be soldered to the PCB for correct thermal performance.
34
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