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LMR23630AFDDA Datasheet(PDF) 3 Page - Texas Instruments |
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LMR23630AFDDA Datasheet(HTML) 3 Page - Texas Instruments |
3 / 9 page EN/SYNC AGND VIN PGND SW BOOT VCC FB Thermal Pad (9) 1 2 3 4 5 6 7 8 LMR23630 www.ti.com SNVSAH2 – DECEMBER 2015 5 Pin Configuration and Functions DDA Package 8-Pin HSOIC Top View Pin Functions PIN I/O (1) DESCRIPTION NAME NO. Switching output of the regulator. Internally connected to both power MOSFETs. Connect to SW 1 O power inductor. Boot-strap capacitor connection for high-side driver. Connect a high quality 470 nF capacitor BOOT 2 O from BOOT to SW. Internal bias supply output for bypassing. Connect bypass capacitor from this pin to AGND. VCC 3 O Do not connect external loading to this pin. Never short this pin to ground during operation. FB 4 I Feedback input to regulator, connect the feedback resistor divider tap to this pin. Enable input to regulator. High = On, Low = Off. Can be connected to VIN. Do not float. Adjust the input under voltage lockout with two resistors. See the Enable and Adjusting EN/SYNC 5 I Under voltage Lockout section. The internal oscillator can be synchronized to an external clock by coupling a positive pulse into this pin through a small coupling capacitor. See the frequency synchronization section for detail. Analog ground pin. Ground reference for internal references and logic. Connect to system AGND 6 G ground. VIN 7 I Input supply voltage with 4 V to 36 V operating range. Power ground pin, connected internally to the low side power FET. Connect to system PGND 8 G ground, PAD, AGND, ground pins of CIN and COUT. Path to CIN must be as short as possible. Low impedance connection to AGND. Connect to PGND on PCB. Major heat dissipation PAD 9 G path of the die. Must be used for heat sinking to ground plane on PCB. (1) I = Input, O = Output, G = Ground. Copyright © 2015, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LMR23630 |
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