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AM3357BZCZD60 Datasheet(PDF) 49 Page - Texas Instruments

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No. de pieza AM3357BZCZD60
Descripción Electrónicos  Sitara Processors
Download  253 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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AM3357BZCZD60 Datasheet(HTML) 49 Page - Texas Instruments

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Copyright © 2011–2016, Texas Instruments Incorporated
Terminal Configuration and Functions
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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352 AM3351
49
AM3359, AM3358, AM3357, AM3356, AM3354, AM3352, AM3351
www.ti.com
SPRS717J – OCTOBER 2011 – REVISED APRIL 2016
(1) An internal 10 kohm pullup is turned on when the oscillator is diasabled. The oscillator is disabled by default after power is applied.
(2) An internal 15 kohm pulldown is turned on when the oscillator is disabled. The oscillator is enabled by default after power is applied.
(3) Do not connect anything to this terminal.
(4) If sysboot[5] is low on the rising edge of PWRONRSTn, this terminal has an internal pulldown turned on after reset is released. If sysboot[5] is high on the rising edge or PWRONRSTn,
this terminal will initially be driven low after reset is released then it begins to toggle at the same frequency of the XTALIN terminal.
(5) LCD_DATA[15:0] terminals are respectively SYSBOOT[15:0] inputs, latched on the rising edge of PWRONRSTn.
(6) Mode1 and Mode2 signal assignments for this terminal are only available with silicon revision 2.0 or newer devices.
(7) Mode2 signal assignment for this terminal is only available with silicon revision 2.0 or newer devices.
(8) Refer to the External Warm Reset section of the AM335x Technical Reference Manual for more information related to the operation of this terminal.
(9) Reset Release Mode = 7 if sysboot[5] is low. Mode = 3 if sysboot[5] is high.
(10) Silicon revision 1.0 devices only provide the MMC2_DAT7 signal when Mode3 is selected. Silicon revision 2.0 and newer devices implement another level of pin multiplexing which
provides the original MMC2_DAT7 signal or RMII2_CRS_DV signal when Mode3 is selected. This new level of of pin multiplexing is selected with bit zero of the SMA2 register. For more
details refer to Section 1.2 of the AM335x Technical Reference Manual.
(11) The 0(PU) indicates that this terminal is initially low based on the description in the AM335x Technical Reference Manual. However, it is also has a weak internal pullup applied.
(12) The input voltage thresholds for this input are not a function of VDDSHV6. Please refer to the DC Electrical Characteristics section for details related to electrical parameters associated
with this input terminal.
(13) The internal USB PHY can be configured to multiplex the UART2_TX or UART2_RX signals to this terminal. For more details refer to USB GPIO Details section of the AM335x Technical
Reference Manual.
(14) The internal USB PHY can be configured to multiplex the UART3_TX or UART3_RX signals to this terminal. For more details refer to USB GPIO Details section of the AM335x Technical
Reference Manual.
(15) This output should only be used to source the recommended crystal circuit.
(16) This parameter only applies when this USB PHY terminal is operating in UART2 mode.
(17) This parameter only applies when this USB PHY terminal is operating in UART3 mode.
(18) This terminal is a analog input used to set the switching threshold of the DDR input buffers to (VDDS_DDR / 2).
(19) This terminal is a analog passive signal that connects to an external 49.9 ohm 1%, 20mW reference resistor which is used to calibrate the DDR input/output buffers.
(20) This terminal is analog input that may also be configured as an open-drain output.
(21) This terminal is analog input that may also be configured as an open-source or open-drain output.
(22) This terminal is analog input that may also be configured as an open-source output.
(23) This terminal is high-Z when the oscillator is disabled. This terminal is driven high if RTC_XTALIN is less than VIL, driven low if RTC_XTALIN is greater than VIH, and driven to a
unknown value if RTC_XTALIN is between VIL and VIH when the oscillator is enabled. The oscillator is disabled by default after power is applied.
(24) This terminal is high-Z when the oscillator is disabled. This terminal is driven high if XTALIN is less than VIL, driven low if XTALIN is greater than VIH, and driven to a unknown value if
XTALIN is between VIL and VIH when the oscillator is enabled. The oscillator is enabled by default after power is applied.
(25) For all pins with content in the Ball Reset State column of this table, the terminal is not defined until all the supplies are ramped.
(26) This terminal requires two power supplies, VDDA3p3v_USB0 and VDDA1p8v_USB0. The "*" character in the power supply name is a wild card that represents "3p3v" and "1p8v".
(27) This terminal requires two power supplies, VDDA3p3v_USB1 and VDDA1p8v_USB1. The "*" character in the power supply name is a wild card that represents "3p3v" and "1p8v".
(28) Refer to Section 6.2.2 for additional details about VSS_OSC.
(29) Refer to Section 6.2.2 for additional details about VSS_RTC.
(30) This power rail is connected to VDD_CORE in the ZCE package.
(31) This terminal provides a Kelvin connection to VDD_MPU. It can be connected to the power supply feedback input to provide remote sensing which compensates for voltage drop in the


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