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ADS1282SJDJ Datasheet(PDF) 8 Page - Texas Instruments |
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ADS1282SJDJ Datasheet(HTML) 8 Page - Texas Instruments |
8 / 59 page 8 ADS1282-HT SBAS446H – DECEMBER 2009 – REVISED FEBRUARY 2016 www.ti.com Product Folder Links: ADS1282-HT Submit Documentation Feedback Copyright © 2009–2016, Texas Instruments Incorporated Electrical Characteristics (continued) Limit specifications at –55°C to 210°C. Typical specifications at 25°C, AVDD = 2.5 V, AVSS = –2.5 V, ƒCLK (1) = 4.096 MHz, VREFP = 2.5 V, VREFN = –2.5 V, DVDD = 3.3 V, CAPN – CAPP = 10 nF, PGA = 1, and ƒDATA = 1000 SPS, unless otherwise noted. PARAMETER TEST CONDITIONS TA = –55°C to 125°C TA = 210°C (2) UNIT MIN TYP MAX MIN TYP MAX Power dissipation High-resolution mode 25 41 29.7 56.1 mW Standby mode 0.58 1.1 16.9 21.6 mW Power-down mode 0.45 0.95 15.6 19.3 mW (1) ƒCLK = System clock (2) Minimum and maximum parameters are characterized for operation at TA = 175°C, but may not be production tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance. (3) Input impedance is improved by disabling input chopping (CHOP bit = 0). (4) VIN = 20 mVDC / PGA, see Table 1. (5) VIN = 31.25 Hz, –0.5 dBFS. 7.5 Electrical Characteristics (PW Package) Limit specifications at –55°C to 175°C. Typical specifications at 25°C, AVDD = 2.5 V, AVSS = –2.5 V, ƒCLK (1) = 4.096 MHz, VREFP = 2.5 V, VREFN = –2.5 V, DVDD = 3.3 V, CAPN – CAPP = 10 nF, PGA = 1, and ƒDATA = 1000 SPS, unless otherwise noted. PARAMETER TEST CONDITIONS TA = –55°C to 125°C TA = 175°C (2) UNIT MIN TYP MAX MIN TYP MAX ANALOG INPUTS Full-scale input voltage VIN = (AINP – AINN) ±VREF / (2 × PGA) ±VREF / (2 × PGA) V Absolute input range AINP or AINN AVSS + 0.7 AVDD – 1.25 AVSS + 0.7 AVDD – 1.25 V PGA input voltage noise density 5 5 nV/ √Hz Differential input impedance(3) 1 1 G Ω Common-mode input impedance 100 100 M Ω Input bias current 1 1000 nA Crosstalk f = 31.25 Hz –128 –123 dB MUX on-resistance 30 45 Ω PGA OUTPUT (CAPP, CAPN) Absolute output range AVSS + 0.4 AVDD – 0.4 AVSS + 0.4 AVDD – 0.4 V PGA differential output impedance 600 600 Ω Output impedance tolerance ±10% ±10% External bypass capacitance 10 100 10 nF Modulator differential input impedance 55 55 k Ω AC PERFORMANCE Signal-to-noise ratio(4) SNR 112 124 112 122 dB Total harmonic distortion(5) THD PGA = 1...16 –122 –99 –112 –99 dB PGA = 32 –117 –99 –106 –94 PGA = 64 –115 –102 Spurious-free dynamic range SFDR 123 dB DC PERFORMANCE Resolution No missing codes 31 31 bits Data rate ƒDATA FIR filter mode 250 4000 250 4000 SPS Sinc filter mode 8000 128000 8000 128000 SPS |
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