Motor de Búsqueda de Datasheet de Componentes Electrónicos |
|
ADC12130CIN Datasheet(PDF) 9 Page - National Semiconductor (TI) |
|
|
ADC12130CIN Datasheet(HTML) 9 Page - National Semiconductor (TI) |
9 / 41 page AC Electrical Characteristics (Continued) The following specifications apply for (V + =V A+=VD+ = +5V, VREF+ = +4.096V, and fully-differential input with fixed 2.048V common-mode voltage) or (V + =V A+=VD+ = +3.3V, VREF+ = +2.5V and fully-differential input with fixed 1.250V common-mode voltage), V REF− = 0V, 12-bit + sign conversion mode, source impedance for analog inputs, VREF− and VREF+ ≤ 25Ω,f CK =fSK = 5 MHz, and 10 (tCK) acquisition time unless otherwise specified. Boldface limits apply for TA =TJ = T MIN to TMAX; all other limits TA =TJ = 25˚C. (Note 17) Symbol Parameter Conditions Typical Limits Units (Note 10) (Note 11) (Limits) t A Acquisition Time 6 Cycles Programmed 6(t CK) 6(t CK) (min) (Note 19) 7(t CK) (max) 1.2 µs (min) 1.4 µs (max) 10 Cycles Programmed 10(t CK) 10(t CK) (min) 11(t CK) (max) 2.0 µs (min) 2.2 µs (max) 18 Cycles Programmed 18(t CK) 18(t CK) (min) 19(t CK) (max) 3.6 µs (min) 3.8 µs (max) 34 Cycles Programmed 34(t CK) 34(t CK) (min) 35(t CK) (max) 6.8 µs (min) 7.0 µs (max) t CAL Self-Calibration Time 4944(t CK) 4944(t CK) (max) 988.8 µs (max) t AZ Auto-Zero Time 76(t CK) 76(t CK) (max) 15.2 µs (max) t SYNC Self-Calibration or 2(t CK) 2(t CK) (min) Auto-Zero Synchronization 3(t CK) (max) Time from DOR 0.40 µs (min) 0.60 µs (max) t DOR DOR High Time when CS is Low 9(t SK) 9(t SK) (max) Continuously for Read Data and Software Power Up/Down 1.8 µs (max) t CONV CONV Valid Data Time 8(t SK) 8(t SK) (max) 1.6 µs (max) AC Electrical Characteristics The following specifications apply for (V + =V A+=VD+ = +5V, VREF+ = +4.096V, and fully-differential input with fixed 2.048V common-mode voltage) or (V + =V A+=VD+ = +3.3V, VREF+ = +2.5V and fully-differential input with fixed 1.250V common-mode voltage), V REF− = 0V, 12-bit + sign conversion mode, source impedance for analog inputs, VREF− and VREF+ ≤ 25Ω,f CK =fSK = 5 MHz, and 10 (tCK) acquisition time unless otherwise specified. Boldface limits apply for TA =TJ = T MIN to TMAX; all other limits TA =TJ = 25˚C. (Note 17) (Continued) Symbol Parameter Conditions Typical Limits Units (Note 10) (Note 11) (Limits) t HPU Hardware Power-Up Time, Time from 500 700 µs (max) PD Falling Edge to EOC Rising Edge t SPU Software Power-Up Time, Time from Serial Data Clock Falling Edge to 500 700 µs (max) EOC Rising Edge t ACC Access Time Delay from 25 60 ns (max) CS Falling Edge to DO Data Valid www.national.com 9 |
Número de pieza similar - ADC12130CIN |
|
Descripción similar - ADC12130CIN |
|
|
Enlace URL |
Política de Privacidad |
ALLDATASHEET.ES |
¿ALLDATASHEET es útil para Ud.? [ DONATE ] |
Todo acerca de Alldatasheet | Publicidad | Contáctenos | Política de Privacidad | Intercambio de Enlaces | Lista de Fabricantes All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |