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ADC12441883 Datasheet(PDF) 11 Page - National Semiconductor (TI) |
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ADC12441883 Datasheet(HTML) 11 Page - National Semiconductor (TI) |
11 / 14 page 20 Functional Description (Continued) Digital Control Inputs AD Function CS WR RD CAL AZ 1 1 1 Start Conversion without Auto-Zero 1 1 1 Read Conversion Result without Auto-Zero 1 1 0 Start Conversion with Auto-Zero 1 1 0 Read Conversion Result with Auto-Zero 1X X X Start Calibration Cycle 0 X 1 0 X Test Mode (DB2 DB3 DB5 and DB6 become active) FIGURE 1 Function of the AD Control Inputs The table in Figure 1 summarizes the effect of the digital control inputs on the function of the ADC12441 The Test Mode where RD is high and CS and CAL are low is used during manufacture to thoroughly check out the operation of the ADC12441 Care should be taken not to inadvertently be in this mode since DB2 DB3 DB5 and DB6 become active outputs which may cause data bus contention 22 RESETTING THE AD All internal logic can be reset which will abort any conver- sion in process The AD is reset whenever a new conver- sion is started by taking CS and WR low If this is done when the analog input is being sampled or when EOC is low the Auto-Cal correction factors may be corrupted therefore re- quiring an Auto-Cal cycle before the next conversion This is true with or without Auto-Zero The Calibration Cycle cannot be reset once started On power-up the ADC12441 auto- matically goes through a Calibration Cycle that takes typi- cally 1396 clock cycles For reasons that will be discussed in Section 37 a new calibration cycle needs to be started after the completion of the automatic one 30 Analog Considerations 31 REFERENCE VOLTAGE The voltage applied to the reference input of the converter defines the voltage span of the analog input (the difference between VIN and AGND) over which 4095 positive output codes and 4096 negative output codes exist The A-to-D can be used in either ratiometric or absolute reference ap- plications The voltage source driving VREF must have a very low output impedance and very low noise The circuit in Figure 2a is an example of a very stable reference that is appropriate for use with the ADC12441 The simple refer- ence circuit of Figure 2b may be used when the application does not require low full scale errors In a ratiometric system the analog input voltage is propor- tional to the voltage used for the AD reference When this voltage is the system power supply the VREF pin can be tied to VCC This technique relaxes the stability requirement of the system reference as the analog input and AD refer- ence move together maintaining the same output code for given input condition TLH11017 – 19 Tantalum Ceramic FIGURE 2a Low Drift Extremely Stable Reference Circuit TLH11017 – 20 Errors without any trims 25 C b 40 Cto a85 C Full Scale g 0075% g 02% Zero g 0024% g 0024% Linearity g LSB g LSB FIGURE 2b Simple Reference Circuit 11 |
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