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MTV003 Datasheet(PDF) 8 Page - List of Unclassifed Manufacturers

No. de pieza MTV003
Descripción Electrónicos  Microprocessor Compatible Monitor Controller
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Fabricante Electrónico  ETC [List of Unclassifed Manufacturers]
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MTV003 Datasheet(HTML) 8 Page - List of Unclassifed Manufacturers

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MYSON
TECHNOLOGY
MTV003N
(MTV003)
MTV003 Revision 2.3 07/01/1998
8/13
Reg14 (write)
: Reserved.
Reg15 (write)
: Reserved.
Reg16 (write)
: Controls i) enabler, ii) band selection, iii) 4 pattern modes and iv) output enabler
for the self-test pattern generator.
1. Selft
= 1
-> Enables generator.
= 0
-> Disables generator.
2. STbsh
= 1
-> 63.5KHz (horizontal) output selected.
= 0
-> 31.75 KHz (horizontal) output selected.
3. RT1, RT0
= 0,0
-> Positive cross-hatch pattern output.
= 0,1
-> Negative cross-hatch pattern output.
= 1,0
-> Full white pattern output.
= 1,1
-> Full black pattern output.
4. STF= 1
-> Enables STOUT output.
= 0
-> Disables STOUT output.
Reg17 (write)
: Reinitializes all internal registers.
Reg26 (write)
: Output pulse width control for XDA0.
Reg27 (write)
: Output pulse width control for XDA1.
Reg28 (write)
: Output pulse width control for XDA2.
Reg29 (write)
: Output pulse width control for XDA3.
Reg30 (write)
: Output pulse width control for XDA4.
Reg31 (write)
: Reserved.
*1. The above T = 250ns.
2. All D/A converters are centered with a value of
DA7 - 0= 10000000, and other registers are initialized with
low after power-on or a Reg17 write.
3. The duration of power-on initialization is 200ms and Reg17 write reinitiation is 2.5ms. No register access is
allowed during initialization.


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