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COP8ACC5 Datasheet(PDF) 34 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
No. de Pieza. COP8ACC5
Descripción  8-Bit CMOS ROM Based Microcontrollers with 4k Memory and High Resolution A/D
Descarga  41 Pages
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Fabricante  NSC [National Semiconductor (TI)]
Página de inicio  http://www.national.com
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COP8ACC5 Datasheet(HTML) 34 Page - National Semiconductor (TI)

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Instruction Set (Continued)
SBIT
#,Mem
Set BIT
1 to bit, Mem (bit = 0 to 7 immediate)
RBIT
#,Mem
Reset BIT
0 to bit, Mem
IFBIT
#,Mem
IF BIT
If bit #,A or Mem is true do next instruction
RPND
Reset PeNDing Flag
Reset Software Interrupt Pending Flag
X
A,Mem
EXchange A with Memory
A
Mem
X
A,[X]
EXchange A with Memory [X]
A
[X]
LD
A,Meml
LoaD A with Memory
A ← Meml
LD
A,[X]
LoaD A with Memory [X]
A ← [X]
LD
B,Imm
LoaD B with Immed.
B ← Imm
LD
Mem,Imm
LoaD Memory Immed
Mem ← Imm
LD
Reg,Imm
LoaD Register Memory Immed.
Reg ← Imm
XA, [B±]
EXchange A with Memory [B]
A
[B], (B ← B ±1)
XA, [X±]
EXchange A with Memory [X]
A
[X], (X ←X±1)
LD
A, [B±]
LoaD A with Memory [B]
A ← [B], (B ← B±1)
LD
A, [X±]
LoaD A with Memory [X]
A ← [X], (X ← X±1)
LD
[B±],Imm
LoaD Memory [B] Immed.
[B] ← Imm, (B ← B±1)
CLR
A
CLeaR A
A ← 0
INC
A
INCrement A
A ← A+1
DEC
A
DECrement A
A ← A−1
LAID
Load A InDirect from ROM
A ← ROM (PU,A)
DCOR
A
Decimal CORrect A
A ← BCD correction of A (follows ADC, SUBC)
RRC
A
Rotate A Right thru C
C → A7 → ... → A0 → C
RLC
A
Rotate A Left thru C
C ← A7 ←... ← A0 ← C
SWAP
A
SWAP nibbles of A
A7...A4
A3...A0
SC
Set C
C ← 1, HC ← 1
RC
Reset C
C ← 0, HC ← 0
IFC
IF C
IF C is true, do next instruction
IFNC
IF Not C
If C is not true, do next instruction
POP
A
POP the stack into A
SP ← SP+1,A ← [SP]
PUSH
A
PUSH A onto the stack
[SP] ← A, SP ← SP−1
VIS
Vector to Interrupt Service Routine
PU ← [VU], PL←[VL]
JMPL
Addr.
Jump absolute Long
PC ← ii (ii = 15 bits, 0 to 32k)
JMP
Addr.
Jump absolute
PC9...0 ← i(i = 12 bits)
JP
Disp.
Jump relative short
PC ← PC+r(ris−31 to +32, except 1)
JSRL
Addr.
Jump SubRoutine Long
[SP]←PL, [SP-1] ← PU,SP-2, PC ← ii
JSR
Addr
Jump SubRoutine
[SP]←PL, [SP-1] ← PU,SP-2, PC9...0 ← i
JID
Jump InDirect
PL←ROM (PU,A)
RET
RETurn from subroutine
SP + 2, PL← [SP], PU← [SP-1]
RETSK
RETurn and SKip
SP + 2, PL← [SP],PU← [SP-1], skip next instruction
RETI
RETurn from Interrupt
SP + 2, PL ← [SP],PU← [SP-1],GIE←1
INTR
Generate an Interrupt
[SP]← PL, [SP-1]← PU, SP-2, PC← 0FF
NOP
No OPeration
PC← PC+1
www.national.com
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