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CS9210-VNG Datasheet(PDF) 9 Page - National Semiconductor (TI) |
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CS9210-VNG Datasheet(HTML) 9 Page - National Semiconductor (TI) |
9 / 39 page Revision 3.2 9 www.national.com Signal Definitions (Continued) 2.2.2 Serial Interface Signals Signal Name Pin No. Type (Drive) Description SCLK 15 I Serial Interface Clock This input signal is the clock for the serial control interface. The other serial interface signals (SDIN, SCS, SDO) are synchronous to this sig- nal. SDIN 16 I Serial Data Input This is the data input line for the serial control interface. Input data is serialized on this pin, including the command stream for register reads and writes. SDO 22 O (6 mA) Serial Data Output This is the data output line for the serial control interface. Output data is serialized on this pin in response to register read commands. SCS 21 I Serial Chip Select This active high chip select indicates when valid data is being clocked in or out via the SDIN/SDO pins. 2.2.3 Flat Panel Interface Signals Signal Name Pin No. Type (Drive) Description LP 127 O (12 mA) Latch Pulse This is the line pulse or latch pulse for the flat panel data, indicating the output data is not valid, a display line has ended and another is about to start. Depending on the type of panel being interfaced, this signal can also be referred to as CL1 or LINE. SHFCLK 110 O (12 mA) Panel Clock (Shift Clock) This is the shift clock or pixel clock for the flat panel data. This signal is used to clock pixel data into the LCD panel. Depending on the type of panel being interfaced, this signal can also be referred to as CL2 or SHIFT. FLM 123 O (12 mA) First Line Marker This is the frame pulse for the flat panel data indicating the output data is not valid, and one display frame has ended and another is about to start. Depending on the type of panel being interfaced, this signal can also be referred to as FP or FRAME. UD[11:0] 122-111 O (12 mA) Upper Scan Data These outputs are the upper panel pixel data bus to the DSTN LCD panel. Its format is dependent on the display mode configured for the LCD panel. Refer to Section 3.1 “Mode Selection” on page 12. LD[11:0] 107-96 O (12 mA) Lower Scan Data These outputs are the lower panel pixel data bus to the DSTN LCD panel. Its format is dependent on the display mode configured for the LCD panel. Refer to Section 3.1 “Mode Selection” on page 12. |
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