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ADC12QS065 Datasheet(PDF) 6 Page - Texas Instruments

No. de pieza ADC12QS065
Descripción Electrónicos  MSPS A/D Converter
Download  34 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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ADC12QS065 Datasheet(HTML) 6 Page - Texas Instruments

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VA
AGND
To Internal Circuitry
I/O
ADC12QS065
SNOSAD6I – JULY 2005 – REVISED APRIL 2013
www.ti.com
Operating Ratings
(1) (2)
Operating Temperature
−40°C ≤ TA ≤ +85°C
Supply Voltage (VA, VD)
+3.0V to +3.6V
Output Driver Supply (VDR)
+2.4V to VD
VIN Differential Input Range
±VREF
VCM Input Common Mode Range (Differential Input)
VREF/2 to (VA - VREF/2 )
External VREF Voltage Range
0.8V to 1V
Digital Input Pins Voltage Range (excludes pins 31 to 50)
−0.3V to (VA + 0.3V)
|AGND–DGND|
≤100mV
Clock Duty Cycle
30% to 70%
(1)
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for
which the device is ensured to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance
characteristics may degrade when the device is not operated under the listed test conditions. Operation of the device beyond the
maximum Operating Ratings is not recommended.
(2)
All voltages are measured with respect to GND = AGND = DGND = 0V, unless otherwise specified.
Converter Electrical Characteristics
Unless otherwise specified, the following specifications apply for AGND = DGND = DRGND = 0V, VA = VD = +3.3V, VDR=
+2.5V, Internal VREF = +1.0V, fCLK = 65 MHz, fIN = 5 KHz, CL = 15 pF/pin. Boldface limits apply for TJ = TMIN to TMAX: all
other limits TJ = 25°C
(1) (2) (3) (4)
Units
Symbol
Parameter
Conditions
Typical(5)
Limits(5)
(Limits)
STATIC CONVERTER CHARACTERISTICS
Resolution with No Missing Codes
12
Bits (min)
INL
Integral Non Linearity
±0.7
±1.4
LSB (max)
DNL
Differential Non Linearity
±0.3
±0.7
LSB (max)
PGE
Positive Gain Error
±1.5
±3.5
%FS (max)
NGE
Negative Gain Error
±1.1
±3.5
%FS (max)
TC GE
Gain Error Tempco
−40°C ≤ TA ≤ +85°C
7.5
ppm/°C
VOFF
Offset Error (VIN+ = VIN−)
±0.06
±0.75
%FS (max)
TC VOFF
Offset Error Tempco
−40°C ≤ TA ≤ +85°C
4.4
ppm/°C
Under Range Output Code
0
0
Over Range Output Code
4095
4095
(1)
The inputs are protected as shown below. Input voltage magnitudes above VA or below GND will not damage this device, provided
current is limited per. However, errors in the A/D conversion can occur if the input goes above VA or below GND by more than 100 mV.
As an example, if VA is +3.3V, the full-scale input voltage must be ≤+3.4V to ensure accurate conversions.
(2)
To ensure accuracy, it is required that |VA–VD| ≤ 100 mV and separate bypass capacitors are used at each power supply pin.
(3)
With the test condition for VREF = +1.0V (2VP-P differential input), the 12-bit LSB is 488 µV.
(4)
When the input voltage at any pin exceeds the power supplies (that is, VIN < AGND, or VIN > VA), the current at that pin should be
limited to 25 mA. The 50 mA maximum package input current rating limits the number of pins that can safely exceed the power supplies
with an input current of 25 mA to two.
(5)
Typical figures are at TA = 25°C, and represent most likely parametric norms at the time of product characterization. The typical
specifications are not ensured.
6
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