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ADC14V155 Datasheet(PDF) 1 Page - Texas Instruments

No. de pieza ADC14V155
Descripción Electrónicos  1.1 GHz Bandwidth A/D Converter with LVDS Outputs
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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ADC14V155 Datasheet(HTML) 1 Page - Texas Instruments

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ADC14V155
www.ti.com
SNAS397I – MARCH 2007 – REVISED APRIL 2013
ADC14V155 14-Bit, 155 MSPS, 1.1 GHz Bandwidth A/D Converter with LVDS Outputs
Check for Samples: ADC14V155
1
FEATURES
DESCRIPTION
The ADC14V155 is a high-performance CMOS
2
1.1 GHz Full Power Bandwidth
analog-to-digital converter with LVDS outputs. It is
Internal Sample-and-Hold Circuit
capable of converting analog input signals into 14-Bit
Low Power Consumption
digital words at rates up to 155 Mega Samples Per
Second (MSPS). Data leaves the chip in a DDR (Dual
Internal Precision 1.0V Reference
Data rate) format; this allows both edges of the output
Single-Ended or Differential Clock Modes
clock to be utilized while achieving a smaller package
Clock Duty Cycle Stabilizer
size. This converter uses a differential, pipelined
architecture with digital error correction and an on-
Dual +3.3V and +1.8V Supply Operation
chip sample-and-hold circuit to minimize power
Power-Down and Sleep Modes
consumption and the external component count,
Offset Binary or 2's Complement Output Data
while providing excellent dynamic performance. A
Format
unique sample-and-hold stage yields a full-power
bandwidth of 1.1 GHz. The ADC14V155 operates
Dual Data Rate (DDR) LVDS Outputs
from dual +3.3V and +1.8V power supplies and
Pin-Compatible: ADC12V170
consumes 951 mW of power at 155 MSPS.
48-Pin WQFN Package, (7x7x0.8mm, 0.5mm
The separate +1.8V supply for the digital output
Pin-Pitch)
interface allows lower power operation with reduced
noise. A power-down feature reduces the power
APPLICATIONS
consumption to 15 mW while still allowing fast wake-
High IF Sampling Receivers
up time to full operation. In addition there is a sleep
feature which consumes 50 mW of power and has a
Wireless Base Station Receivers
faster wake-up time.
Power Amplifier Linearization
The differential inputs provide a full scale differential
Multi-Carrier, Multi-Mode Receivers
input swing equal to 2 times the reference voltage. A
Test and Measurement Equipment
stable 1.0V internal voltage reference is provided, or
Communications Instrumentation
the ADC14V155 can be operated with an external
reference.
Radar Systems
Clock mode (differential versus single-ended) and
KEY SPECIFICATIONS
output
data
format
(offset
binary
versus
2's
complement)
are
pin-selectable.
A
duty
cycle
Resolution 14 Bits
stabilizer maintains performance over a wide range of
Conversion Rate 155 MSPS
input clock duty cycles.
SNR (fIN = 70 MHz) 71.7 dBFS (typ)
The
ADC14V155
is
pin-compatible
with
the
SFDR (fIN = 70 MHz) 86.9 dBFS (typ)
ADC12V170. It is available in a 48-lead WQFN
package and operates over the industrial temperature
ENOB (fIN = 70 MHz) 11.5 bits (typ)
range of
−40°C to +85°C.
Full Power Bandwidth 1.1 GHz (typ)
Power Consumption 951 mW (typ)
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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