ADS7806

3

SBAS021B

www.ti.com

AC ACCURACY

Spurious-Free Dynamic Range

80

90

✻✻

Total Harmonic Distortion

–90

–80

✻✻

dB

Signal-to-(Noise + Distortion)

70

73

72

✻

dB

Signal-to-Noise

70

73

72

✻

dB

130

✻

kHz

Full-Power Bandwidth (–3dB)

600

✻

kHz

SAMPLING DYNAMICS

Aperture Delay

40

✻

ns

Aperture Jitter

20

✻

ps

Transient Response

FS Step

5

✻

µs

750

✻

ns

REFERENCE

Internal Reference Voltage

No Load

2.48

2.5

2.52

✻✻

✻

V

Internal Reference Source Current

1

✻

µA

(Must use external buffer.)

Internal Reference Drift

8

✻

ppm/

°C

External Reference Voltage Range

2.3

2.5

2.7

✻✻

✻

V

for Specified Linearity

External Reference Current Drain

External 2.5000V Ref

100

✻

µA

DIGITAL INPUTS

Logic Levels

–0.3

+0.8

✻✻

V

+2.0

✻✻

V

±10

✻

µA

±10

✻

µA

DIGITAL OUTPUTS

Data Format

Data Coding

+0.4

✻

V

✻

V

Leakage Current

High-Z State,

±5

✻

µA

Output Capacitance

High-Z State

15

✻

pF

DIGITAL TIMING

Bus Access Time

83

✻

ns

Bus Relinquish Time

83

✻

ns

POWER SUPPLIES

Specified Performance

Must be

≤ V

ANA

+4.75

+5

+5.25

✻✻

✻

V

+4.75

+5

+5.25

✻✻

✻

V

0.6

✻

mA

5.0

✻

mA

Power Dissipation

28

35

✻✻

mW

REFD HIGH

23

✻

mW

PWRD and REFD HIGH

50

✻

µW

TEMPERATURE RANGE

Specified Performance

–40

+85

✻✻

°C

Derated Performance

–55

+125

✻✻

°C

Storage

–65

+150

✻✻

°C

Thermal Resistance (

θ

DIP

75

✻

°C/W

SO

75

✻

°C/W

ADS7806P, U

ADS7806PB, UB

PARAMETER

CONDITIONS

MIN

TYP

MAX

MIN

TYP

MAX

UNITS

Parallel 12-bits in 2-bytes; Serial

Binary Two’s Complement or Straight Binary

✻ Specifications same as ADS7806 P, U.

NOTES: (1) LSB means Least Significant Bit. One LSB for the

±10V input range is 4.88mV. (2) Typical rms noise at worst-case transition. (3) As measured with

fixed resistors, see Figure 7b. Adjustable to zero with external potentiometer. (4) Full-scale error is the worst case of –Full-Scale or +Full-Scale untrimmed deviation

from ideal first and last code transitions, divided by the transition voltage (not divided by the full-scale range) and includes the effect of offset error. (5) This is the

time delay after the ADS7806 is brought out of Power-Down mode until all internal settling occurs and the analog input is acquired to rated accuracy. A Convert

command after this delay will yield accurate results. (6) All specifications in dB are referred to a full-scale input. (7) Usable bandwidth defined as full-scale input

level for the DATACLK signal is 3V.