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ADS1210 Datasheet(PDF) 41 Page - Texas Instruments

No. de pieza ADS1210
Descripción Electrónicos  24-Bit ANALOG-TO-DIGITAL CONVERTER
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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ADS1210 Datasheet(HTML) 41 Page - Texas Instruments

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FIGURE INDEX
TABLE INDEX
FIGURE
TITLE
PAGE
Figure 1
Normalized Digital Filter Response ......................................... 11
Figure 2
Digital Filter Response at a Data Rate of 50Hz ..................... 11
Figure 3
Digital Filter Response at a Data Rate of 60Hz ..................... 11
Figure 4
Asynchronous ADS1210/11 Analog Input Voltage Step or
ADS1211 Channel Change to Fully Settled Output Data ...... 12
Figure 5
Self-Calibration Timing ............................................................ 14
Figure 6
System Offset Calibration Timing ........................................... 14
Figure 7
System Full-Scale Calibration ................................................. 14
Figure 8
Pseudo System Calibration Timing ......................................... 15
Figure 9
Background Calibration ........................................................... 15
Figure 10
Sleep Mode to Normal Mode Timing ...................................... 17
Figure 11
Analog Input Structure ............................................................. 17
Figure 12
±10V Input Configuration Using V
BIAS .................................................... 18
Figure 13
XIN Clock Timing ...................................................................... 22
Figure 14
Serial Input/Output Timing, Master Mode ............................... 22
Figure 15
Serial Input/Output Timing, Slave Mode ................................. 22
Figure 16
Serial Interface Timing (CS LOW), Master Mode ................... 24
Figure 17
Serial Interface Timing (CS LOW), Slave Mode ..................... 24
Figure 18
Serial Interface Timing (Using CS), Master Mode .................. 24
Figure 19
Serial Interface Timing (Using CS), Slave Mode .................... 25
Figure 20
SDIO Input to Output Transition Timing ................................. 25
Figure 21
DRDY Rise and Fall Time ....................................................... 25
Figure 22
DSYNC to XIN Timing for Synchronizing Multiple
ADS1210/11s ........................................................................... 26
Figure 23
Exactly Synchronizing Multiple ADS1210/11s
to Asynchronous DSYNC Signal ............................................. 26
Figure 24
Timing of Data Output Register Update ................................. 26
Figure 25
Flowchart for Writing and Reading Register Data, Master Mode 27
Figure 26
Flowchart for Writing and Reading Register Data, Slave Mode .. 28
Figure 27
Resetting the ADS1210/11 (Slave Mode Only) ...................... 30
Figure 28
Three-Wire Interface with an 8xC32 Microprocessor ............. 31
Figure 29
Three-Wire Interface with an 8xC51 Microprocessor ............. 31
Figure 30
Four-Wire Interface with an 8xC32 Microprocessor ............... 32
Figure 31
Full Interface with an 8xC51 Microprocessor ......................... 32
Figure 32
Full Interface with a 68HC11 Microprocessor ........................ 33
Figure 33
Isolated Four-Wire Interface .................................................... 33
Figure 34
Source Current vs VOH for SDOUT Under
Worst-Case Conditions ............................................................ 34
Figure 35
Sink Current vs VOL for SDOUT Under
Worst-Case Conditions ............................................................ 34
Figure 36
Effect of Synchronization on Output Data Timing .................. 34
Figure 37
Bridge Transducer Interface with Voltage Excitation .............. 36
Figure 38
Bridge Transducer Interface with Current Excitation .............. 36
Figure 39
PT100 Interface ....................................................................... 37
Figure 40
Complete 4-20mA Receiver .................................................... 37
Figure 41
Single Supply, High-Accuracy Thermocouple ......................... 37
Figure 42
Dual Supply, High-Accuracy Thermocouple ........................... 38
Figure 43
Single Supply, High-Accuracy Thermocouple Interface
with Cold Junction Compensation ........................................... 38
Figure 44
Dual Supply, High-Accuracy Thermocouple Interface
with Cold Junction Compensation ........................................... 39
Figure 45
Low-Cost Bridge Transducer Interface with Current Excitation ..... 39
TABLE
TITLE
PAGE
Table I
Full-Scale Range vs PGA Setting ............................................. 9
Table II
Available PGA Settings vs Turbo Mode Rate .......................... 9
Table III
Effective Resolution vs Data Rate and Gain Setting ............. 10
Table IV
Effective Resolution cs Data Rate and Turbo Mode Rate ..... 12
Table V
Noise Level vs Data Rate and Turbo Mode Rate .................. 12
Table VI
Effective Resolution vs Data Rate, Clock Frequency, and
Turbo Mode Rate .................................................................... 12
Table VII
ADS1210/11 Registers ............................................................ 18
Table VIII
Instruction Register .................................................................. 19
Table IX
A3-A0 Addressing .................................................................... 19
Table X
Organization of the Command Register and Default Status .. 19
Table XI
Decimation Ratios vs Data Rates ........................................... 21
Table XII
Data Output Register ............................................................... 21
Table XIII
Offset Calibration Register ...................................................... 22
Table XIV
Full-Scale Calibration Register ................................................ 22
Table XV
Digital Timing Characteristics .................................................. 23


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