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74ACT11374NT Datasheet(Hoja de datos) 1 Page - Texas Instruments

No. de Pieza. 74ACT11374NT
Descripción  OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS
Descarga  18 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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74ACT11374
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCAS217A – JULY 1987 – REVISED APRIL 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Eight D-Type Flip-Flops in a Single Package
D 3-State Bus Driving True Outputs
D Full Parallel Access for Loading
D Inputs Are TTL-Voltage Compatible
D Flow-Through Architecture Optimizes
PCB Layout
D Center-Pin VCC and GND Configurations
Minimize High-Speed Switching Noise
D EPICt (Enhanced-Performance Implanted
CMOS) 1-
mm Process
D 500-mA Typical Latch-Up Immunity at
125
°C
D Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages, and Standard
Plastic 300-mil DIPs (NT)
description
This 8-bit flip-flop features 3-state outputs designed specifically for driving highly-capacitive or relatively
low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers.
The eight flip-flops of the 74ACT11374 are edge-triggered D-type flip-flops. On the positive transition of the clock
(CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.
An output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low
logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus
lines significantly. The high-impedance third state provides the capability to drive bus lines in a bus-organized
system without need for interface or pullup components.
OE does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
The 74ACT11374 is characterized for operation from –40
°C to 85°C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
OE
CLK
D
Q
L
H
H
L
LL
L
LX
Q0
L
HX
Q0
L
XQ0
H
X
X
Z
Copyright
© 1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
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12
24
23
22
21
20
19
18
17
16
15
14
13
1Q
2Q
3Q
4Q
GND
GND
GND
GND
5Q
6Q
7Q
8Q
OE
1D
2D
3D
4D
VCC
VCC
5D
6D
7D
8D
CLK
DB, DW, OR NT PACKAGE
(TOP VIEW)




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