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CD54HCT74F3A Datasheet(PDF) 1 Page - Texas Instruments

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No. de pieza CD54HCT74F3A
Descripción Electrónicos  Dual D Flip-Flop with Set and Reset
Download  17 Pages
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Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

CD54HCT74F3A Datasheet(HTML) 1 Page - Texas Instruments

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Data sheet acquired from Harris Semiconductor
SCHS124D
Features
• Hysteresis on Clock Inputs for Improved Noise
Immunity and Increased Input Rise and Fall Times
• Asynchronous Set and Reset
• Complementary Outputs
• Buffered Inputs
• Typical fMAX = 50MHz at VCC = 5V, CL = 15pF,
TA = 25
oC
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH
Description
The ’HC74 and ’HCT74 utilize silicon gate CMOS technology
to achieve operating speeds equivalent to LSTTL parts.
They exhibit the low power consumption of standard CMOS
integrated circuits, together with the ability to drive 10 LSTTL
loads.
This flip-flop has independent DATA, SET, RESET and
CLOCK inputs and Q and Q outputs. The logic level present
at the data input is transferred to the output during the
positive-going transition of the clock pulse. SET and RESET
are independent of the clock and are accomplished by a low
level at the appropriate input.
The HCT logic family is functionally as well as pin compatible
with the standard LS logic family.
Ordering Information
PART NUMBER
TEMP. RANGE
(oC)
PACKAGE
CD54HC74F3A
-55 to 125
14 Ld CERDIP
CD54HCT74F3A
-55 to 125
14 Ld CERDIP
CD74HC74E
-55 to 125
14 Ld PDIP
CD74HC74M
-55 to 125
14 Ld SOIC
CD74HC74MT
-55 to 125
14 Ld SOIC
CD74HC74M96
-55 to 125
14 Ld SOIC
CD74HCT74E
-55 to 125
14 Ld PDIP
CD74HCT74M
-55 to 125
14 Ld SOIC
CD74HCT74MT
-55 to 125
14 Ld SOIC
CD74HCT74M96
-55 to 125
14 Ld SOIC
NOTE: When ordering, use the entire part number. The suffix 96
denotes tape and reel. The suffix T denotes a small-quantity reel of
250.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
© 2003, Texas Instruments Incorporated
CD54HC74, CD74HC74,
CD54HCT74, CD74HCT74
Dual D Flip-Flop with Set and Reset
Positive-Edge Trigger
[ /Title
(CD54H
C74,
CD74H
C74,
CD74H
CT74)
/Subject
(Dual D
Flip-
Flop
with Set
January 1998 - Revised September 2003


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