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DLPA3005 Datasheet(PDF) 11 Page - Texas Instruments

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No. de Pieza. DLPA3005
Descripción  0.47 1080p DMD
Descarga  39 Pages
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Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
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DLPA3005 Datasheet(HTML) 11 Page - Texas Instruments

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11
DLP4710
www.ti.com
DLPS056B – NOVEMBER 2014 – REVISED JULY 2016
Product Folder Links: DLP4710
Submit Documentation Feedback
Copyright © 2014–2016, Texas Instruments Incorporated
(1)
The DMD is designed to conduct absorbed and dissipated heat to the back of the package. The cooling system must be capable of
maintaining the package within the temperature range specified in the Recommended Operating Conditions. The total heat load on the
DMD is largely driven by the incident light absorbed by the active area; although other contributions include light energy absorbed by the
window aperture and electrical power dissipation of the array. Optical systems should be designed to minimize the light energy falling
outside the window clear aperture since any additional thermal load in this area can significantly degrade the reliability of the device.
6.5 Thermal Information
THERMAL METRIC(1)
DLP4710
UNIT
FQL (LGA)
100 PINS
Thermal resistance Active area to test point 1 (TP1)(1)
1.1
°C/W
(1)
Device electrical characteristics are over Recommended Operating Conditions unless otherwise noted.
(2)
All voltage values are with respect to the ground pins (VSS).
(3)
To prevent excess current, the supply voltage delta |VDDI – VDD| must be less than specified limit.
(4)
Supply power dissipation based on non–compressed commands and data.
(5)
To prevent excess current, the supply voltage delta |VBIAS – VOFFSET| must be less than specified limit.
(6)
Supply power dissipation based on 3 global resets in 200 µs.
(7)
The following power supplies are all required to operate the DMD: VDD, VDDI, VOFFSET, VBIAS, VRESET. All VSS connections are
also required.
(8)
LPSDR specifications are for pins LS_CLK and LS_WDATA.
(9)
Low-speed interface is LPSDR and adheres to the Electrical Characteristics and AC/DC Operating Conditions table in JEDEC Standard
No. 209B, Low-Power Double Data Rate (LPDDR) JESD209B.
6.6 Electrical Characteristics
Over operating free-air temperature range (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS(2)
MIN
TYP
MAX
UNIT
CURRENT
IDD
Supply current: VDD(3) (4)
VDD = 1.95 V
260
mA
VDD = 1.8 V
180
IDDI
Supply current: VDDI(3) (4)
VDDI = 1.95 V
62
mA
VDD = 1.8 V
40
IOFFSET
Supply current: VOFFSET(5) (6)
VOFFSET = 10.5 V
7.4
mA
VOFFSET = 10 V
6.3
IBIAS
Supply current: VBIAS(5) (6)
VBIAS = 18.5 V
1.1
mA
VBIAS = 18 V
0.9
IRESET
Supply current: VRESET(6)
VRESET = –14.5 V
5.4
mA
VRESET = –14 V
4.4
POWER(7)
PDD
Supply power dissipation: VDD(3) (4)
VDD = 1.95 V
507
mW
VDD = 1.8 V
324
PDDI
Supply power dissipation: VDDI(3) (4)
VDDI = 1.95 V
120.9
mW
VDD = 1.8 V
72
POFFSET
Supply power dissipation:
VOFFSET(5) (6)
VOFFSET = 10.5 V
77.7
mW
VOFFSET = 10 V
63
PBIAS
Supply power dissipation: VBIAS (5) (6)
VBIAS = 18.5 V
20.35
mW
VBIAS = 18 V
16.2
PRESET
Supply power dissipation: VRESET(6)
VRESET = –14.5 V
78.3
mW
VRESET = –14 V
61.6
PTOTAL
Supply power dissipation: Total
536.8
804.25
mW
LPSDR INPUT(8)
VIH(DC)
DC input high voltage(9)
0.7 × VDD
VDD + 0.3
V
VIL(DC)
DC input low voltage(9)
–0.3
0.3 × VDD
V
VIH(AC)
AC input high voltage(9)
0.8 × VDD
VDD + 0.3
V
VIL(AC)
AC input low voltage(9)
–0.3
0.2 × VDD
V
∆VT
Hysteresis ( VT+ – VT– )
Figure 10
0.1 × VDD
0.4 × VDD
V


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