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CDCE913-Q1 Datasheet(PDF) 4 Page - Texas Instruments |
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CDCE913-Q1 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 27 page CDCE913-Q1 CDCEL913-Q1 SCAS918A – JUNE 2013 www.ti.com THERMAL INFORMATION (continued) CDCE913-Q1, CDCEL913- Q1 THERMAL METRIC(1) UNIT PW 14 PINS ψJB Junction-to-board characterization parameter(6) 52.8 °CW θJCbot Junction-to-case (bottom) thermal resistance(7) NA °CW (6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7). (7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. Spacer 4 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: CDCE913-Q1 CDCEL913-Q1 |
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