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CDCVF2509PWG4 Datasheet(PDF) 8 Page - Texas Instruments |
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CDCVF2509PWG4 Datasheet(HTML) 8 Page - Texas Instruments |
8 / 16 page 120 100 80 0 60 40 20 fc − Clock Frequency at FBOUT − MHz 140 50 75 100 125 150 175 200 VCC = 3.3 V C(LY) = 25 pF || 500 Ω C(LF) = 12 pF || 500 Ω TA = 25°C See Notes C and D Cycle to Cycle 25 15 10 5 0 20 0 25 50 75 100 125 150 175 AVCC = VCC = 3.6 V Bias = 0/3 V C(LY) = 25 pF || 500 Ω C(LF) = 12 pF || 500 Ω TA = 25°C See Notes A and B fc − Clock Frequency − MHz 200 250 150 100 50 0 200 fc − Clock Frequency − MHz 0 25 50 75 100 125 150 175 200 AVCC = VCC = 3.6 V Bias = 0/3 V C(LY) = 25 pF || 500 Ω C(LF) = 12 pF || 500 Ω TA = 25°C See Notes A and B NOT RECOMMENDED FOR NEW DESIGNS, USE CDCVF2509A AS A REPLACEMENT CDCVF2509 SCAS737D – APRIL 2004 – REVISED FEBRUARY 2010 www.ti.com JITTER ANALOG SUPPLY CURRENT vs vs CLOCK FREQUENCY AT FBOUT CLOCK FREQUENCY Figure 7. Figure 8. SUPPLY CURRENT vs CLOCK FREQUENCY Figure 9. a. Trace length FBOUT to FBIN = 5 mm, ZO = 50 Ω b. C(LY) = Lumped capacitive load Y1-n c. C(LFx) = Lumped feedback capacitance at FBOUT = FBIN d. C(LFx) = Lumped feedback capacitance at FBOUT = FBIN. 8 Submit Documentation Feedback Copyright © 2004–2010, Texas Instruments Incorporated Product Folder Link(s): CDCVF2509 |
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