IOUT

REFIN

VDD

ENABLE

PGND

VSW

PWM

TAO/FAULT

FCCM

BOOT

BOOT_R

VIN

1

2

3

4

5

6

7

8

9

10

11

12

PGND

13

CSD95373BQ5M

www.ti.com

SLPS462 – JUNE 2014

5 Pin Configuration and Functions

Top View

Pin Functions

PIN

DESCRIPTION

NAME

NUMBER

Bootstrap capacitor connection. Connect a minimum of 0.1 µF 16 V X7R ceramic capacitor from BOOT to

BOOT

9

BOOT_R pins. The bootstrap capacitor provides the charge to turn on the control FET. The bootstrap diode is

integrated.

BOOT_R

8

Enables device operation. If ENABLE = logic HIGH, turns on device. If ENABLE = logic LOW, the device is

ENABLE

3

turned off and both MOSFET gates are actively pulled low. An internal 100 k

Ω pulldown resistor will pull the

ENABLE pin LOW if left floating.

This pin enables the Diode Emulation function. When this pin is held LOW, Diode Emulation Mode is enabled for

FCCM

10

Sync FET. When FCCM is HIGH, the device is operated in Forced Continuous Conduction Mode. An internal 5-

µA current source will pull the FCCM pin to 3.3 V if left floating.

IOUT

1

Output of current sensing amplifier. V(IOUT) – V(REFIN) is proportional to the phase current.

4

Power ground, connected directly to pin 13.

13

Power ground.

Pulse width modulated 3-state input from external controller. Logic LOW sets control FET gate low and sync FET

PWM

12

gate high. Logic HIGH sets control FET gate high and sync FET gate low. Open or High Z sets both MOSFET

REFIN

2

External reference voltage input for current sensing amplifier.

Temperature analog output. Reports a voltage proportional to the die temperature. An ORing diode is integrated

TAO/

in the IC. When used in multiphase application, a single wire can be used to connect the TAO pins of all the ICs.

11

FAULT

Only the highest temperature will be reported. TAO will be pulled up to 3.3 V if thermal shutdown occurs. TAO

5

Supply voltage to gate driver and internal circuitry.

7

Input voltage pin. Connect input capacitors close to this pin.

6

Phase node connecting the HS MOSFET source and LS MOSFET drain - pin connection to the output inductor.

Copyright © 2014, Texas Instruments Incorporated

Submit Documentation Feedback

3

Product Folder Links: CSD95373BQ5M