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ADS1242 Datasheet(PDF) 4 Page - Texas Instruments

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No. de pieza ADS1242
Descripción Electrónicos  24-Bit ANALOG-TO-DIGITAL CONVERTER
Download  25 Pages
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI - Texas Instruments

ADS1242 Datasheet(HTML) 4 Page - Texas Instruments

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ADS1242, 1243
4
SBAS235B
www.ti.com
ELECTRICAL CHARACTERISTICS: VDD = 3V
All specifications TMIN to TMAX, VDD = +3V, fMOD = 19.2kHz, PGA = 1, Buffer ON, fDATA = 15Hz, VREF ≡ (REF IN+) – (REF IN–) = +1.25V, unless otherwise specified.
ADS1242
ADS1243
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG INPUT (AIN0 – AIN7)
Analog Input Range
Buffer OFF
GND – 0.1
VDD + 0.1
V
Buffer ON
GND + 0.05
VDD – 1.5
V
Full-Scale Input Voltage Range
(In+) – (In–) See Block Diagram, RANGE = 0
±V
REF /PGA
V
RANGE = 1
±V
REF /(2 • PGA)
V
Input Impedance
Buffer OFF
5/PGA
M
Buffer ON
5
G
Bandwidth
fDATA = 3.75Hz
–3dB
1.65
Hz
fDATA = 7.50Hz
–3dB
3.44
Hz
fDATA = 15.00Hz
–3dB
14.6
Hz
Programmable Gain Amplifier
User-Selectable Gain Ranges
1
128
Input Capacitance
9pF
Input Leakage Current
Modulator OFF, T = 25
°C5
pA
Burnout Current Sources
2
µA
OFFSET DAC
Offset DAC Range
RANGE = 0
±V
REF /(2 • PGA)
V
RANGE = 1
±V
REF /(4 • PGA)
V
Offset DAC Monotonicity
8
Bits
Offset DAC Gain Error
±10
%
Offset DAC Gain Error Drift
2
ppm/
°C
SYSTEM PERFORMANCE
Resolution
No Missing Codes
24
Bits
Integral Nonlinearity
End Point Fit
±0.0015
% of FS
Offset Error(1)
15
ppm of FS
Offset Drift(1)
0.04
ppm of FS/
°C
Gain Error(1)
0.01
%
Gain Error Drift(1)
1.0
ppm/
°C
Common-Mode Rejection
at DC
100
dB
fCM = 60Hz, fDATA = 15Hz
130
dB
fCM = 50Hz, fDATA = 15Hz
120
dB
Normal-Mode Rejection
fSIG = 50Hz, fDATA = 15Hz
100
dB
fSIG = 60Hz, fDATA = 15Hz
100
dB
Output Noise
See Typical Characteristics
Power-Supply Rejection
at DC, dB = –20 log(
∆V
OUT /VDD)
(2)
75
90
dB
VOLTAGE REFERENCE INPUT
Reference Input Range
REF IN+, REF IN–
0VDD
V
VREF
VREF ≡ (REF IN+) – (REF IN–), RANGE = 0
0.1
1.25
1.30
V
RANGE = 1
0.1
2.5
2.6
V
Common-Mode Rejection
at DC
120
dB
Common-Mode Rejection
fVREFCM = 60Hz, fDATA = 15Hz
120
dB
Bias Current(3)
VREF = 1.25
0.65
µA
POWER-SUPPLY REQUIREMENTS
Power-Supply Voltage
VDD
2.7
3.3
V
Current
PGA = 1, Buffer OFF
190
375
µA
PGA = 128, Buffer OFF
460
700
µA
PGA = 1, Buffer ON
240
375
µA
PGA = 128, Buffer ON
870
1325
µA
SLEEP Mode
75
µA
Read Data Continuous Mode
113
µA
PDWN = 0
0.5
nA
Power Dissipation
PGA = 1, Buffer OFF
0.6
1.2
mW
TEMPERATURE RANGE
Operating
–40
+85
°C
Storage
–60
+100
°C
NOTES: (1) Calibration can minimize these errors. (2)
∆V
OUT is a change in digital result. (3) 12pF switched capacitor at fSAMP clock frequency.


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