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SM320F28335-EP Datasheet(PDF) 3 Page - Texas Instruments |
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SM320F28335-EP Datasheet(HTML) 3 Page - Texas Instruments |
3 / 167 page SM320F28335-EP www.ti.com SPRS581D – JUNE 2009 – REVISED MAY 2012 4.7.3 ADC Calibration ................................................................................................. 74 4.8 Multichannel Buffered Serial Port (McBSP) Module .................................................................. 75 4.9 Enhanced Controller Area Network (eCAN) Modules (eCAN-A and eCAN-B) .................................... 78 4.10 Serial Communications Interface (SCI) Modules (SCI-A, SCI-B, SCI-C) .......................................... 83 4.11 Serial Peripheral Interface (SPI) Module (SPI-A) ..................................................................... 86 4.12 Inter-Integrated Circuit (I2C) ............................................................................................. 89 4.13 GPIO MUX ................................................................................................................. 90 4.14 External Interface (XINTF) ............................................................................................... 97 5 Device Support ................................................................................................................. 99 6 Electrical Specifications ..................................................................................................... 99 6.1 Absolute Maximum Ratings .............................................................................................. 99 6.2 Recommended Operating Conditions ................................................................................. 101 6.3 Electrical Characteristics ................................................................................................ 101 6.4 Current Consumption .................................................................................................... 102 6.4.1 Reducing Current Consumption ............................................................................. 103 6.4.2 Current Consumption Graphs ............................................................................... 104 6.4.3 Thermal Design Considerations ............................................................................. 105 6.5 Emulator Connection Without Signal Buffering for the DSP ....................................................... 105 6.6 Timing Parameter Symbology .......................................................................................... 107 6.6.1 General Notes on Timing Parameters ...................................................................... 107 6.6.2 Test Load Circuit .............................................................................................. 107 6.6.3 Device Clock Table ........................................................................................... 107 6.7 Clock Requirements and Characteristics ............................................................................. 109 6.8 Power Sequencing ....................................................................................................... 110 6.8.1 Power Management and Supervisory Circuit Solutions .................................................. 110 6.9 General-Purpose Input/Output (GPIO) ................................................................................ 113 6.9.1 GPIO - Output Timing ........................................................................................ 113 6.9.2 GPIO - Input Timing .......................................................................................... 114 6.9.3 Sampling Window Width for Input Signals ................................................................. 115 6.9.4 Low-Power Mode Wakeup Timing .......................................................................... 116 6.10 Enhanced Control Peripherals ......................................................................................... 120 6.10.1 Enhanced Pulse Width Modulator (ePWM) Timing ....................................................... 120 6.10.2 Trip-Zone Input Timing ....................................................................................... 120 6.11 External Interrupt Timing ................................................................................................ 122 6.12 I2C Electrical Specification and Timing ............................................................................... 123 6.13 Serial Peripheral Interface (SPI) Timing .............................................................................. 123 6.13.1 Master Mode Timing .......................................................................................... 123 6.13.2 SPI Slave Mode Timing ...................................................................................... 127 6.14 External Interface (XINTF) Timing ..................................................................................... 130 6.14.1 USEREADY = 0 ............................................................................................... 130 6.14.2 Synchronous Mode (USEREADY = 1, READYMODE = 0) ............................................. 131 6.14.3 Asynchronous Mode (USEREADY = 1, READYMODE = 1) ............................................ 131 6.14.4 XINTF Signal Alignment to XCLKOUT ..................................................................... 133 6.14.5 External Interface Read Timing ............................................................................. 134 6.14.6 External Interface Write Timing ............................................................................. 135 6.14.7 External Interface Ready-on-Read Timing With One External Wait State ............................ 137 6.14.8 External Interface Ready-on-Write Timing With One External Wait State ............................. 140 6.14.9 XHOLD and XHOLDA Timing ............................................................................... 143 6.15 On-Chip Analog-to-Digital Converter .................................................................................. 146 6.15.1 ADC Power-Up Control Bit Timing .......................................................................... 147 6.15.2 Definitions ...................................................................................................... 148 6.15.3 Sequential Sampling Mode (Single-Channel) (SMODE = 0) ............................................ 149 6.15.4 Simultaneous Sampling Mode (Dual-Channel) (SMODE = 1) .......................................... 150 Copyright © 2009–2012, Texas Instruments Incorporated Contents 3 |
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