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SN74AS821ANT Datasheet(PDF) 1 Page - Texas Instruments |
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SN74AS821ANT Datasheet(HTML) 1 Page - Texas Instruments |
1 / 11 page SN54AS821A . . . JT PACKAGE SN74AS821A . . . DW OR NT PACKAGE (TOP VIEW) SN54AS821A . . . FK PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 OE 1D 2D 3D 4D 5D 6D 7D 8D 9D 10D GND VCC 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q CLK NC – No internal connection 32 1 28 27 12 13 5 6 7 8 9 10 11 25 24 23 22 21 20 19 3Q 4Q 5Q NC 6Q 7Q 8Q 3D 4D 5D NC 6D 7D 8D 426 14 15 16 17 18 SN54AS821A, SN74AS821A 10-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS SDAS230A – DECEMBER 1983 – REVISED AUGUST 1995 Copyright © 1995, Texas Instruments Incorporated 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 • Functionally Equivalent to AMD’s AM29821 • Provide Extra Data Width Necessary for Wider Address/Data Paths or Buses With Parity • Outputs Have Undershoot-Protection Circuitry • Power-Up High-Impedance State • Buffered Control Inputs to Reduce dc Loading Effects • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs description These 10-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers. The ten flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are true to the data (D) input. A buffered output-enable (OE) input can be used to place the ten outputs in either a normal logic state (high or low logic levels) or a high- impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components. OE does not affect the internal operation of the flip-flops. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state. The SN54AS821A is characterized for operation over the full military temperature range of – 55 °C to 125°C. The SN74AS821A is characterized for operation from 0 °C to 70°C. FUNCTION TABLE (each flip-flop) INPUTS OUTPUT OE CLK D Q L ↑ H H L ↑ LL L LX Q0 H X X Z PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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