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MC9S12A256B Datasheet(PDF) 11 Page - Freescale Semiconductor, Inc |
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MC9S12A256B Datasheet(HTML) 11 Page - Freescale Semiconductor, Inc |
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11 / 126 page  MC9S12DP256B Device User Guide — V02.15 11 List of Figures Figure 0-1 Order Part Number Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 Figure 1-1 MC9S12DP256B Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 Figure 1-2 MC9S12DP256B Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Figure 2-1 Pin Assignments in 112-pin LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54 Figure 2-2 Pin Assignments in 80-pin QFP for MC9S12DG256 . . . . . . . . . . . . . . . . . . . . . .55 Figure 2-3 Pin Assignments in 80-pin QFP for MC9S12DJ256 . . . . . . . . . . . . . . . . . . . . . .56 Figure 2-4 PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 Figure 3-1 Clock Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71 Figure 20-1 Recommended PCB Layout 112 LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85 Figure 20-2 Recommended PCB Layout for 80QFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .86 Figure A-1 ATD Accuracy Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 Figure A-2 Basic PLL functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109 Figure A-3 Jitter Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Figure A-4 Maximum bus clock jitter approximation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Figure A-5 SPI Master Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Figure A-6 SPI Master Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Figure A-7 SPI Slave Timing (CPHA = 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Figure A-8 SPI Slave Timing (CPHA =1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Figure A-9 General External Bus Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Figure B-1 112-pin LQFP mechanical dimensions (case no. 987) . . . . . . . . . . . . . . . . . . 124 Figure B-2 80-pin QFP Mechanical Dimensions (case no. 841B) . . . . . . . . . . . . . . . . . . . 125 Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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