Motor de Búsqueda de Datasheet de Componentes Electrónicos
  Spanish  ▼
ALLDATASHEET.ES

X  

SN74ABT8996PWLE Datasheet(PDF) 10 Page - Texas Instruments

No. de pieza SN74ABT8996PWLE
Descripción Electrónicos  10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
Download  46 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Fabricante Electrónico  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo TI1 - Texas Instruments

SN74ABT8996PWLE Datasheet(HTML) 10 Page - Texas Instruments

Back Button SN74ABT8996PWLE Datasheet HTML 6Page - Texas Instruments SN74ABT8996PWLE Datasheet HTML 7Page - Texas Instruments SN74ABT8996PWLE Datasheet HTML 8Page - Texas Instruments SN74ABT8996PWLE Datasheet HTML 9Page - Texas Instruments SN74ABT8996PWLE Datasheet HTML 10Page - Texas Instruments SN74ABT8996PWLE Datasheet HTML 11Page - Texas Instruments SN74ABT8996PWLE Datasheet HTML 12Page - Texas Instruments SN74ABT8996PWLE Datasheet HTML 13Page - Texas Instruments SN74ABT8996PWLE Datasheet HTML 14Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 10 / 46 page
background image
SN54ABT8996, SN74ABT8996
10-BIT ADDRESSABLE SCAN PORTS
MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SCBS489C – AUGUST 1994 – REVISED APRIL 1999
10
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Test-Logic-Reset
The ASP TAP-state monitor powers up in the Test-Logic-Reset state. Alternatively, the ASP can be forced
asynchronously to this state by assertion of its PTRST input. In the stable Test-Logic-Reset state, the ASP is
enabled to receive and respond to shadow protocols. The ASP does not recognize the TSA in this state.
For a target device in the stable Test-Logic-Reset state, the test logic is reset and is disabled so that the normal
logic function of the device is performed. The instruction register is reset to an opcode that selects the optional
IDCODE instruction, if supported, or the BYPASS instruction. Certain data registers also can be reset to their
power-up values.
Run-Test/Idle
In the stable Run-Test/Idle state, the ASP is enabled to receive and respond to shadow protocols. The ASP does
not recognize the TSA in this state.
For a target device, Run-Test/Idle is a stable state in which the test logic can be actively running a test or can
be idle.
Select-DR-Scan, Select-lR-Scan
The ASP is not enabled to receive and respond to shadow protocols in the Select-DR-Scan and
Select-lR-Scan states.
For a target device, no specific function is performed in the Select-DR-Scan and Select-lR-Scan states, and the
TAP controller exits either of these states on the next TCK cycle. These states allow the selection of either
data-register scan or instruction-register scan.
Capture-DR
The ASP is not enabled to receive and respond to shadow protocols in the Capture-DR state.
For a target device in the Capture-DR state, the selected data register can capture a data value as specified
by the current instruction. Such capture operations occur on the rising edge of TCK, upon which the Capture-DR
state is exited.
Shift-DR
The ASP is not enabled to receive and respond to shadow protocols in the Shift-DR state.
For a target device, upon entry to the Shift-DR state, the selected data register is placed in the scan path
between TDI and TDO, and on the first falling edge of TCK, TDO goes from the high-impedance state to an
active state. TDO outputs the logic level present in the least-significant bit of the selected data register. While
in the stable Shift-DR state, data is serially shifted through the selected data register on each TCK cycle.
Exit1-DR, Exit2-DR
The ASP is not enabled to receive and respond to shadow protocols in the Exit1-DR and Exit2-DR states.
For a target device, the Exit1-DR and Exit2-DR states are temporary states that end a data-register scan. It is
possible to return to the Shift-DR state from either Exit1-DR or Exit2-DR without recapturing the data register.
On the first falling edge of TCK after entry to Exit1-DR, TDO goes from the active state to the
high-impedance state.
Pause-DR
In the stable Pause-DR state, the ASP is enabled to receive and respond to shadow protocols. Additionally, the
TSA can be recognized in this state.
For target devices, no specific function is performed in the stable Pause-DR state. The Pause-DR state
suspends and resumes data-register scan operations without loss of data.


Número de pieza similar - SN74ABT8996PWLE

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Texas Instruments
SN74ABT8996PW TI-SN74ABT8996PW Datasheet
564Kb / 40P
[Old version datasheet]   10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS
More results

Descripción similar - SN74ABT8996PWLE

Fabricante ElectrónicoNo. de piezaDatasheetDescripción Electrónicos
logo
Texas Instruments
SN54ABT8996 TI-SN54ABT8996 Datasheet
564Kb / 40P
[Old version datasheet]   10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS
SN54LVT8996 TI-SN54LVT8996_99 Datasheet
603Kb / 41P
[Old version datasheet]   3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SN54LVT8996 TI-SN54LVT8996 Datasheet
717Kb / 44P
[Old version datasheet]   3.3-V 10-BIT ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 JTAG TAP TRANSCEIVERS
SN74LVT8986 TI-SN74LVT8986 Datasheet
880Kb / 47P
[Old version datasheet]   3.3-V LINKING ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SN74LVT8986 TI-SN74LVT8986_07 Datasheet
885Kb / 54P
[Old version datasheet]   3.3-V LINKING ADDRESSABLE SCAN PORTS MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (JTAG) TAP TRANSCEIVERS
SN74LVT8996-EP TI1-SN74LVT8996-EP Datasheet
764Kb / 42P
[Old version datasheet]   3.3-V 10-BIT ADDRESSABLE SCAN PORT MULTIDROP-ADDRESSABLE IEEE STD 1149.1 (KTAG) TAP TRANSCEIVER
logo
National Semiconductor ...
SCANSTA111 NSC-SCANSTA111 Datasheet
524Kb / 29P
   Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
SCANSTA111 NSC-SCANSTA111_05 Datasheet
911Kb / 31P
   Enhanced SCAN bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
logo
Texas Instruments
SCANSTA111 TI1-SCANSTA111 Datasheet
1Mb / 38P
[Old version datasheet]   SCANSTA111 Enhanced SCAN Bridge Multidrop Addressable IEEE 1149.1 (JTAG) Port
logo
Xilinx, Inc
XQ18V04 XILINX-XQ18V04_03 Datasheet
155Kb / 15P
   IEEE Std 1149.1 boundary-scan (JTAG) support
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46


Datasheet Descarga

Go To PDF Page


Enlace URL




Política de Privacidad
ALLDATASHEET.ES
¿ALLDATASHEET es útil para Ud.?  [ DONATE ] 

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com