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LM2796 Datasheet(PDF) 4 Page - Texas Instruments |
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LM2796 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 16 page  LM2796 SNVS273A – MAY 2004 – REVISED MAY 2013 www.ti.com ELECTRICAL CHARACTERISTICS (1) (2) Limits in standard typeface and typical values apply for TJ = 25ºC. Limits in boldface type apply over the full operating junction temperature range (-30°C ≤ TJ ≤ +85°C) . Unless otherwise specified: VIN = 3.6V; VDxx = 3.6V; V(EN) = 2.0V; Group A and Group B LEDs not ON simultaneously (3) (ENA = V IN and ENB = GND, or ENA = GND and ENB = VIN); RSET = 8.35kΩ; CIN, C1, C2, and CPOUT = 1µF (4). Symbol Parameter Condition Min Typ Max Units 3.0V ≤ VIN ≤ 4.2V, and VIN = 5.5V 13.8 16.2 mA 2.5V ≤ VDxx ≤ 3.8V; 15 (-8%) (+8%) (%) RSET = 8.35kΩ 3.0V ≤ VIN ≤ 5.5V; 2.5V ≤ VDxx ≤ 3.6V; 20 mA RSET = 6.25kΩ 3.0V ≤ VIN ≤ 5.5V; IDxx Output Current Regulation 2.5V ≤ VDxx ≤ 3.9V; 10 mA RSET = 12.5kΩ 2.7V ≤ VIN ≤ 3.0V; 2.5V ≤ VDxx ≤ 3.3V; 15 mA RSET = 8.35kΩ ENA and ENB ON (all 7 IDX outputs active), VIN = 15 mA 3.0V, CIN = COUT = 2.2µF Current Matching Between Any IDxx-MATCH Two Group A Outputs or Group B VIN = 3.0V (5) 1 % Outputs 2.7V ≤ VIN ≤ 4.2V; IQ Quiescent Supply Current No Load Current, 3.5 6 mA EN = ON, ENA = ENB = OFF ISD Shutdown Supply Current 2.7V ≤ VIN ≤ 5.5V, EN = OFF 3 4.5 µA VSET ISET Pin Voltage 2.7V ≤ VIN ≤ 5.5V 1.25 V Output Current to Current Set IDxx/ISET 100 Ratio Charge Pump Output ROUT VIN = 3.0V 2.7 Ω Resistance(6) IDxx = 95% X IDxx (nom) RSET = 8.35kΩ 320 (IDxx (nom) ≈ 15mA) Current Source Headroom Voltage VHR mV Requirement(7) IDxx = 95%X IDxx (nom) RSET = 12.5kΩ 220 (IDxx (nom) ≈ 10mA) fSW Switching Frequency 3.0V ≤ VIN ≤ 4.2V 325 500 675 kHz tSTART Start-up Time IDx = 90% steady state 100 µs Charge pump gain cross-over: 1.5x to 1x Threshold 4.75 V Gain = 1.5 when VIN is below 1.5x/1x threshold. Gain = 1 when VIN is 1x to 1.5x Threshold 4.55 V above threshold. Logic Pin Specifications: EN, ENA, ENB VIL Input Logic Low 2.7V ≤ VIN ≤ 5.5V 0 0.5 V (1) All voltages are with respect to the potential at the GND pin. (2) Min and Max limits are specified by design, test, or statistical analysis. Typical numbers are not specified, but do represent the most likely norm. (3) If both LED groups are to be ON simultaneously, the maximum VDxx voltage may need to be derated, depending on minimum input voltage conditions. Refer to the "MAXIMUM OUTPUT CURRENT, MAXIMUM LED VOLTAGE, MINIMUM INPUT VOLTAGE" section. (4) CIN, COUT, C1, and C2 : Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics (5) For the two groups of outputs on a part (Group A and Group B), the following are determined: the maximum output current in the group (MAX), the minimum output current in the group (MIN), and the average output current of the group (AVG). For each group, two matching numbers are calculated: (MAX-AVG)/AVG and (AVG-MIN)/AVG. The largest number of the two (worst case) is considered the matching figure for the group. The matching figure for a given part is considered to be the highest matching figure of the two groups. The typical specification provided is the most likely norm of the matching figure for all parts. (6) Output resistance (ROUT) models all voltage losses in the charge pump. ROUT can be used to estimate the voltage at the charge pump output (POUT): VPout = (1.5 × VIN) – (ROUT × IOUT). In the equation, IOUT is the total output current: the sum of all active Dxx output currents and all current drawn from POUT. The equation applies when the charge pump is operating with a gain of 3/2 (VIN ≤ 4.75V typ.). (7) Headroom voltage: VHR = VPout – VDxx . If headroom voltage requirement is not met, LED current regulation will be compromised. 4 Submit Documentation Feedback Copyright © 2004–2013, Texas Instruments Incorporated Product Folder Links: LM2796 |
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