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SN74ALVC3631-20PCB Datasheet(PDF) 4 Page - Texas Instruments |
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SN74ALVC3631-20PCB Datasheet(HTML) 4 Page - Texas Instruments |
4 / 29 page SN74ALVC3631, SN74ALVC3641, SN74ALVC3651 512 × 36, 1024 × 36, 2048 × 36 SYNCHRONOUS FIRST-IN, FIRST-OUT MEMORIES SDMS025B – OCTOBER 1999 – REVISED JUNE 2000 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagram Port-A Control Logic CLKA CSA W/RA ENA MBA Reset Logic RST 512 × 36 or 1024 × 36 or 2048 × 36† SRAM Mail1 Register Write Pointer Read Pointer Status-Flag Logic Flag-Offset Register Mail2 Register Port-B Control Logic IR AF FS0/SD FS1/SEN A0–A35 MBF2 MBF1 OR AE B0–B35 CLKB CSB W/RB ENB MBB RTM RFM 10 36 † 512 × 36 for the SN74ALVC3631, 1024 × 36 for the SN74ALVC3641, and 2048 × 36 for the SN74ALVC3651 |
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