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LM43602 Datasheet(PDF) 3 Page - Texas Instruments |
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LM43602 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 44 page SW VIN PGND CBOOT VCC BIAS SYNC RT PGOOD EN SS/TRK AGND FB SW PGND VIN PAD (17) 1 16 2 3 4 5 6 8 7 9 15 14 13 12 11 10 LM43602 www.ti.com SNVSA36A – APRIL 2014 – REVISED APRIL 2014 6 Pin Configuration and Functions 16-Pin HTSSOP (PWP) Top View Pin Functions PIN DESCRIPTION NAME NUMBER SW 1,2 Switching output of the regulator. Internally connected to both power MOSFETs. Connect to power inductor. CBOOT 3 Boot-strap capacitor connection for high-side driver. Connect a high quality 470 nF capacitor from CBOOT to SW. VCC 4 Internal bias supply output for bypassing. Connect bypass capacitor from this pin to AGND. Do not connect external loading to this pin. Never short this pin to ground during operation. BIAS 5 Optional internal LDO supply input. To improve efficiency, it is recommended to tie to VOUT when 3.3 V ≤ VOUT ≤ 28 V, or tie to an external 3.3 V or 5 V rail if available. When used, place a bypass capacitor (1 to 10 µF) from this pin to ground. Tie to ground when not in use. SYNC 6 Clock input to synchronize switching action to an external clock. Use proper high speed termination to prevent ringing. Connect to ground if not used. RT 7 Connect a resistor RT from this pin to AGND to program switching frequency. Leave floating for 500 kHz default switching frequency. PGOOD 8 Open drain output for power-good flag. Use a 10 k Ω to 100 kΩ pull-up resistor to logic rail or other DC voltage no higher than 12 V. FB 9 Feedback sense input pin. Connect to the midpoint of feedback divider to set VOUT. Do not short this pin to ground during operation. AGND 10 Analog ground pin. Ground reference for internal references and logic. Connect to system ground. SS/TRK 11 Soft-start control pin. Leave floating for internal soft-start slew rate. Connect to a capacitor to extend soft start time. Connect to external voltage ramp for tracking. EN 12 Enable input to the internal LDO and regulator. High = ON and low = OFF. Connect to VIN, or to VIN through resistor divider,or to an external voltage or logic source. Do not float. VIN 13,14 Supply input pins to internal LDO and high side power FET. Connect to power supply and bypass capacitors CIN. Path from VIN pin to high frequency bypass CIN and PGND must be as short as possible. PGND 15,16 Power ground pins, connected internally to the low side power FET. Connect to system ground, PAD, AGND, ground pins of CIN and COUT. Path to CIN must be as short as possible. PAD 17 Low impedance connection to AGND. Connect to PGND on PCB. Major heat dissipation path of the die. Must be used for heat sinking to ground plane on PCB. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM43602 |
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