LM5051_13 datasheet(4/23 Pages) TI1

No. de pieza	LM5051

Descripción Electrónicos	Low Side OR-ing FET Controller

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Fabricante Electrónico	TI1 [Texas Instruments]

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LM5051

SNVS702D – OCTOBER 2011 – REVISED MARCH 2013

www.ti.com

Electrical Characteristics

Limits in standard type are for TJ = 25°C only; limits in boldface type apply over the operating junction temperature (TJ)

range of -40°C to +125°C. Minimum and Maximum limits are ensured through test, design, or statistical correlation. Typical

values represent the most likely parametric norm at TJ = 25°C, and are provided for reference purposes only. Unless

otherwise stated all conditions and measurements are referenced to device pin 7 (INP/VSS), and the following conditions

apply: VLINE= 48.0V, VINN= -150 mV, VOFF= 0.0V, CGATE= 47 nF, CVCC= 0.1 µF, and TJ= 25°C.

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

LINE Pin

VLINE = 48.0V

ILINE

LINE Pin current

-

690

780

μA

VCC Pin = Open

VCC Pin

VCC

Operating Voltage Range

LINE Pin = Open

4.50

-

VZ

V

IVCC = 2 mA

11.9

13.0

14.3

VZ

VCC Shunt Zener Voltage

V

IVCC = 10 mA

12.5

13.5

14.5

ΔVZ

Shunt Zener Regulation

IVCC = 2 mA to 10 mA

-

0.50

1.11

V

VVCC = VZ - 100mV

-

1.0

1.50

IVCC

Supply Current

mA

VVCC = 5.0V

-

0.4

1.10

INN Pin

VINN = 0.0V

-

3.1

-

IINN

INN Pin Current

μA

VINN = 90V

-

0.04

-

GATE

VGATE = 5.5V

GATE Charge Current

0.28

0.66

0.95

mA

VINN = -150mV

IGATE

VGATE = 5.5V

GATE Discharge Current

VINN = -150 mV to +300 mV

2.4

3.5

-

A

t

≤ 10 ms

VLINE = 48.0V

-

13.0

-

VGATE

GATE Pin High Voltage

VVCC = 10.25V, LINE = Open

9.98

10.2

-

V

VVCC = 5.0V, LINE= Open

4.70

4.95

-

VINN going negative until Gate

VSD(REV)

Reverse Threshold

-112.2

-45

+11.4

mV

Drive Turns ON

ΔVSD(REV)

Reverse Threshold Hysteresis

VINN going positive from

VSD(REV) Threshold until Gate

-

50

-

mV

Drive Turns OFF

VSD(REG)

Regulated VINP/VSS to VINN Threshold

-10.8

12

30.8

mV

CGATE = 0

(1)

-

34

50

Gate Capacitance Discharge Time at

tGATE(REV)

Forward to Reverse Transition

CGATE = 10 nF

(1)

-

60

-

ns

See Figure 6

CGATE = 47 nF

(1)

-

90

230

Gate Capacitance Discharge Time at

tGATE(OFF)

OFF pin Low to High Transition

CGATE = 47 nF

(2)

-

120

-

ns

See Figure 7

OFF Pin

VINN = -400 mV

VOFF(IH)

OFF Input High Threshold Voltage

1.28

1.50

1.65

VOFF Rising until Gate is Low

V

VINN = -400 mV

VOFF(IL)

OFF Input Low Threshold Voltage

-

1.48

-

VOFF Falling until Gate is High

ΔVOFF

OFF Threshold Voltage Hysteresis

VOFF(IH) - VOFF(IL)

-

20

-

mV

IOFF(IH)

OFF Pin Internal Pull-down

VOFF = 5.0V

-

4.6

6.00

µA

IOFF(IL)

VOFF = 0.0V

-

-0.03

-

µA

(1)

Time from VINN voltage transition from -200 mV to +500 mV until Gate pin voltage falls to ≤ 1.00V. See Figure 6

(2)

Time from VOFF voltage transition from 0.0V to 5.0V until GATE pin voltage falls to ≤ 1.0V. See Figure 7

4

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