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LMZ10500 Datasheet(PDF) 11 Page - Texas Instruments |
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LMZ10500 Datasheet(HTML) 11 Page - Texas Instruments |
11 / 34 page LMZ10500 www.ti.com SNVS723F – OCTOBER 2011 – REVISED FEBRUARY 2015 Feature Description (continued) Since the output current is limited during normal startup by the softstart function, the current charging the output capacitor is also limited. This results in a smooth VOUT ramp up to nominal voltage. However, using excessively large output capacitance or VCON capacitance under normal conditions can prevent the output voltage from reaching 0.375 V at the end of the startup sequence. In such cases the module will maintain the described above hiccup mode and the output voltage will not ramp up to final value. To cause this condition, one would have to use unnecessarily large output capacitance for 650mA load applications. See the Input and Output Capacitor Selection section for guidance on maximum capacitances for different output voltage settings. 7.3.4 Thermal Overload Protection The junction temperature of the LMZ10500 should not be allowed to exceed its maximum operating rating of 125°C. Thermal protection is implemented by an internal thermal shutdown circuit which activates at 150°C (typ). When this temperature is reached, the device enters a low power standby state. In this state switching remains off causing the output voltage to fall. Also, the VCON capacitor is discharged to SGND. When the junction temperature falls back below 130°C (typ) normal startup occurs and VOUT rises smoothly from 0 V. Applications requiring maximum output current may require derating at elevated ambient temperature. See the Typical Characteristics section for thermal derating plots for various output voltages. 7.4 Device Functional Modes 7.4.1 Circuit Operation The LMZ10500 is a synchronous Buck power module using a PFET for the high side switch and an NFET for the synchronous rectifier switch. The output voltage is regulated by modulating the PFET switch on-time. The circuit generates a duty-cycle modulated rectangular signal. The rectangular signal is averaged using a low pass filter formed by the integrated inductor and an output capacitor. The output voltage is equal to the average of the duty- cycle modulated rectangular signal. In PWM mode, the switching frequency is constant. The energy per cycle to the load is controlled by modulating the PFET on-time, which controls the peak inductor current. In current mode control architecture, the inductor current is compared with the slope compensated output of the error amplifier. At the rising edge of the clock, the PFET is turned ON, ramping up the inductor current with a slope of (VIN - VOUT)/L. The PFET is ON until the current signal equals the error signal. Then the PFET is turned OFF and NFET is turned ON, ramping down the inductor current with a slope of VOUT /L. At the next rising edge of the clock, the cycle repeats. An increase of load pulls the output voltage down, resulting in an increase of the error signal. As the error signal goes up, the peak inductor current is increased, elevating the average inductor current and responding to the heavier load. To ensure stability, a slope compensation ramp is subtracted from the error signal and internal loop compensation is provided. 7.4.2 Input Undervoltage Detection The LMZ10500 implements an under voltage lock out (UVLO) circuit to ensure proper operation during startup, shutdown and input supply brownout conditions. The circuit monitors the voltage at the VIN pin to ensure that sufficient voltage is present to bias the regulator. If the under voltage threshold is not met, all functions of the controller are disabled and the controller remains in a low power standby state. 7.4.3 Shutdown Mode To shutdown the LMZ10500, pull the EN pin low (< 0.5 V). In the shutdown mode all internal circuits are turned OFF. 7.4.4 EN Pin Operation The EN pin is internally pulled up to VIN through a 790 kΩ (typ.) resistor. This allows the nano module to be enabled by default when the EN pin is left floating. In such cases VIN will set EN high when VIN reaches 1.2 V. As the input voltage continues to rise, operation will start once VIN exceeds the under-voltage lockout (UVLO) threshold. To set EN high externally, pull it up to 1.2 V or higher. Note that the voltage on EN must remain at less than VIN+ 0.2 V due to absolute maximum ratings of the device. Copyright © 2011–2015, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Links: LMZ10500 |
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