Motor de Búsqueda de Datasheet de Componentes Electrónicos
Selected language     Spanish  ▼
Nombre de pieza
         Descripción


UCD90240 Datasheet(Hoja de datos) 6 Page - Texas Instruments

No. de Pieza. UCD90240
Descripción  UCD90240 24-Rail PMBus Power Sequencer and System Manager
Descarga  49 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Fabricante  TI1 [Texas Instruments]
Página de inicio  http://www.ti.com
Logo 

 6 page
background image
UCD90240
SLVSCW0 – FEBRUARY 2015
www.ti.com
Pin Functions (continued)
PIN
I/O
DESCRIPTION
TYPE
NAME
NO.
GPIO17
H13
I/O
GPI / Command GPO / WDI / WDO / System Reset / Fault Pin for multiple chip cascading
GPIO18
H12
I/O
GPI / Command GPO / WDI / WDO / System Reset / Fault Pin for multiple chip cascading
GPIO19
H11
I/O
GPI / Command GPO / WDI / WDO / System Reset / Fault Pin for multiple chip cascading
GPIO20
L13
I/O
GPI / Command GPO / WDI / WDO / System Reset / Fault Pin for multiple chip cascading
GPIO21
B11
I/O
GPI / Command GPO / WDI / WDO / System Reset / Fault Pin for multiple chip cascading
GPIO22
B12
I/O
GPI / Command GPO / WDI / WDO / System Reset / Fault Pin for multiple chip cascading
GPIO23
C11
I/O
GPI / Command GPO / WDI / WDO / System Reset / Fault Pin for multiple chip cascading
GPIO24
A12
I/O
GPI / Command GPO / WDI / WDO / System Reset / Fault Pin for multiple chip cascading
SYNC_CLK
K2
I/O
Synchronization clock I/O for multiple chip cascading
Logic GPO PINS
LGPO1
C9
O
Logic GPO
LGPO2
B9
O
Logic GPO
LGPO3
A9
O
Logic GPO
LGPO4
C8
O
Logic GPO
LGPO5
D5
O
Logic GPO
LGPO6
C5
O
Logic GPO
LGPO7
C6
O
Logic GPO
LGPO8
C4
O
Logic GPO
LGPO9
L3
O
Logic GPO
LGPO10
M1
O
Logic GPO
LGPO11
M2
O
Logic GPO
LGPO12
M3
O
Logic GPO
PMBus COMM INTERFACE
PMBUS_CLK
E10
I
PMBus clock (must pull up to V33D)
PMBUS_DATA
D13
I/O
PMBus data (must pull up to V33D)
PMBALERT#
F11
O
PMBus alert, active-low, open-drain output (must pull up to V33D)
PMBUS_CNTRL
E11
I
PMBus control pin
PMBUS_ADDR0
L2
I
PMBus digital address input. Bit 0.
PMBUS_ADDR1
L1
I
PMBus digital address input. Bit 1.
PMBUS_ADDR2
K1
I
PMBus digital address input. Bit 2.
JTAG
JTAG_TMS
A10
I
Test mode select with internal pullup
JTAG_TCK
C10
I
Test clock with internal pullup
JTAG_TDO
A11
I/O
Test data out with internal pullup
JTAG_TDI
B10
I/O
Test data in with internal pullup
INPUT POWER, GROUND, AND EXTERNAL REFERENCE PINS
RESET
G10
I
Active-low device reset input. Pull up to V33D.
Analog 3.3-V supply. It should be decoupled from V33D to minimize the electrical noise
V33A
D3
I
contained on V33D from affecting the analog functions.
D7
E6
E8
E9
V33D
I
Digital 3.3-V supply for I/O and some logic.
F10
J7
J9
J10
6
Submit Documentation Feedback
Copyright © 2015, Texas Instruments Incorporated
Product Folder Links: UCD90240




Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48  49 


Datasheet Download




Enlace URL

¿ALLDATASHEET es útil para Ud.?  [ DONATE ]  

Todo acerca de Alldatasheet   |   Publicidad   |   Contáctenos   |   Política de Privacidad   |   Favorito   |   Intercambio de Enlaces   |   Lista de Fabricantes
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  , Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp  |   Russian : Alldatasheetru.com
Korean : Alldatasheet.co.kr   |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com  |   Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl